Loading arch/arm64/boot/dts/qcom/atoll.dtsi +19 −14 Original line number Diff line number Diff line Loading @@ -74,7 +74,7 @@ L1_I_0: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_0: l1-dcache { Loading @@ -83,7 +83,7 @@ }; L2_TLB_0: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -108,7 +108,7 @@ L1_I_100: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_100: l1-dcache { Loading @@ -117,7 +117,7 @@ }; L2_TLB_100: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -143,7 +143,7 @@ L1_I_200: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_200: l1-dcache { Loading @@ -152,7 +152,7 @@ }; L2_TLB_200: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -177,7 +177,7 @@ L1_I_300: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_300: l1-dcache { Loading @@ -186,7 +186,7 @@ }; L2_TLB_300: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -211,7 +211,7 @@ L1_I_400: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_400: l1-dcache { Loading @@ -220,7 +220,7 @@ }; L2_TLB_400: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -245,7 +245,7 @@ L1_I_500: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_500: l1-dcache { Loading @@ -254,7 +254,7 @@ }; L2_TLB_500: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -280,7 +280,7 @@ L1_I_600: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x11000>; qcom,dump-size = <0x22000>; }; L1_D_600: l1-dcache { Loading Loading @@ -323,7 +323,7 @@ L1_I_700: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x11000>; qcom,dump-size = <0x22000>; }; L1_D_700: l1-dcache { Loading Loading @@ -1542,6 +1542,11 @@ qcom,dump-node = <&L2_TLB_700>; qcom,dump-id = <0x127>; }; qcom,llcc1_d_cache { qcom,dump-node = <&LLCC_1>; qcom,dump-id = <0x140>; }; }; mem_dump { Loading Loading
arch/arm64/boot/dts/qcom/atoll.dtsi +19 −14 Original line number Diff line number Diff line Loading @@ -74,7 +74,7 @@ L1_I_0: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_0: l1-dcache { Loading @@ -83,7 +83,7 @@ }; L2_TLB_0: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -108,7 +108,7 @@ L1_I_100: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_100: l1-dcache { Loading @@ -117,7 +117,7 @@ }; L2_TLB_100: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -143,7 +143,7 @@ L1_I_200: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_200: l1-dcache { Loading @@ -152,7 +152,7 @@ }; L2_TLB_200: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -177,7 +177,7 @@ L1_I_300: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_300: l1-dcache { Loading @@ -186,7 +186,7 @@ }; L2_TLB_300: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -211,7 +211,7 @@ L1_I_400: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_400: l1-dcache { Loading @@ -220,7 +220,7 @@ }; L2_TLB_400: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -245,7 +245,7 @@ L1_I_500: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x8800>; qcom,dump-size = <0x10800>; }; L1_D_500: l1-dcache { Loading @@ -254,7 +254,7 @@ }; L2_TLB_500: l2-tlb { qcom,dump-size = <0x5000>; qcom,dump-size = <0x5a00>; }; }; Loading @@ -280,7 +280,7 @@ L1_I_600: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x11000>; qcom,dump-size = <0x22000>; }; L1_D_600: l1-dcache { Loading Loading @@ -323,7 +323,7 @@ L1_I_700: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x11000>; qcom,dump-size = <0x22000>; }; L1_D_700: l1-dcache { Loading Loading @@ -1542,6 +1542,11 @@ qcom,dump-node = <&L2_TLB_700>; qcom,dump-id = <0x127>; }; qcom,llcc1_d_cache { qcom,dump-node = <&LLCC_1>; qcom,dump-id = <0x140>; }; }; mem_dump { Loading