Merge "clk: qcom: Defer the display clock driver probe for TRINKET" (3525a399) · Commits · e / devices / android_kernel_oneplus_sm8150

arch/arm64/boot/dts/qcom/trinket.dtsi

+2 −0

Original line number	Diff line number	Diff line
		@@ -811,6 +811,8 @@
		reg = <0x5f00000 0x20000>;
		reg-names = "cc_base";
		vdd_cx-supply = <&VDD_CX_LEVEL>;
		clock-names = "cfg_ahb_clk";
		clocks = <&clock_gcc GCC_DISP_AHB_CLK>;
		#clock-cells = <1>;
		};

+12 −2

Original line number	Diff line number	Diff line
		@@ -19,6 +19,7 @@
		#include <linux/module.h>
		#include <linux/of.h>
		#include <linux/of_device.h>
		#include <linux/clk.h>
		#include <linux/clk-provider.h>
		#include <linux/regmap.h>

		@@ -344,7 +345,7 @@ static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = {
		.rate_max = (unsigned long[VDD_NUM]) {
		[VDD_LOWER] = 192000000,
		[VDD_LOW] = 256000000,
		[VDD_LOW_L1] = 307000000},
		[VDD_LOW_L1] = 307200000},
		},
		};

		@@ -385,7 +386,7 @@ static struct clk_rcg2 disp_cc_mdss_rot_clk_src = {
		.rate_max = (unsigned long[VDD_NUM]) {
		[VDD_LOWER] = 192000000,
		[VDD_LOW] = 256000000,
		[VDD_LOW_L1] = 307000000},
		[VDD_LOW_L1] = 307200000},
		},
		};

		@@ -744,6 +745,7 @@ MODULE_DEVICE_TABLE(of, disp_cc_trinket_match_table);
		static int disp_cc_trinket_probe(struct platform_device *pdev)
		{
		struct regmap *regmap;
		struct clk *clk;
		int ret;

		vdd_cx.regulator[0] = devm_regulator_get(&pdev->dev, "vdd_cx");
		@@ -753,6 +755,14 @@ static int disp_cc_trinket_probe(struct platform_device *pdev)
		return PTR_ERR(vdd_cx.regulator[0]);
		}

		clk = devm_clk_get(&pdev->dev, "cfg_ahb_clk");
		if (IS_ERR(clk)) {
		if (PTR_ERR(clk) != -EPROBE_DEFER)
		dev_err(&pdev->dev, "Unable to get ahb clock handle\n");
		return PTR_ERR(clk);
		}
		devm_clk_put(&pdev->dev, clk);

		regmap = qcom_cc_map(pdev, &disp_cc_trinket_desc);
		if (IS_ERR(regmap)) {
		pr_err("Failed to map the disp_cc registers\n");