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Commit 34ba1341 authored by Ghanim Fodi's avatar Ghanim Fodi Committed by Gerrit - the friendly Code Review server
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msm: gsi: Support GSI channel not full irq 



GSI version 2.5 adds new interrupt indicating if
channel not full. This change configures the MCS
(GSI firmware controller) to handle it.

CRs-Fixed: 2257475
Change-Id: Ia51ed43734627af5003d3b01b9d444e2c717bc29
Signed-off-by: default avatarGhanim Fodi <gfodi@codeaurora.org>
parent b365d04c

drivers/platform/msm/gsi/gsi.c

+17 −3
Original line number Diff line number Diff line
@@ -2849,7 +2849,7 @@ int gsi_set_channel_cfg(unsigned long chan_hdl, struct gsi_chan_props *props, 
}

EXPORT_SYMBOL(gsi_set_channel_cfg);



static void gsi_configure_ieps(void *base)

static void gsi_configure_ieps(void *base, enum gsi_ver ver)

{

	void __iomem *gsi_base = base;
@@ -2866,6 +2866,10 @@ static void gsi_configure_ieps(void *base) 
	gsi_writel(11, gsi_base + GSI_GSI_IRAM_PTR_NEW_RE_OFFS);

	gsi_writel(12, gsi_base + GSI_GSI_IRAM_PTR_READ_ENG_COMP_OFFS);

	gsi_writel(13, gsi_base + GSI_GSI_IRAM_PTR_TIMER_EXPIRED_OFFS);



	if (ver >= GSI_VER_2_5)

		gsi_writel(17,

			gsi_base + GSI_V2_5_GSI_IRAM_PTR_TLV_CH_NOT_FULL_OFFS);

}



static void gsi_configure_bck_prs_matrix(void *base)
@@ -2908,10 +2912,20 @@ static void gsi_configure_bck_prs_matrix(void *base) 
}



int gsi_configure_regs(phys_addr_t gsi_base_addr, u32 gsi_size,

		phys_addr_t per_base_addr)

		phys_addr_t per_base_addr, enum gsi_ver ver)

{

	void __iomem *gsi_base;



	if (!gsi_ctx) {

		pr_err("%s:%d gsi context not allocated\n", __func__, __LINE__);

		return -GSI_STATUS_NODEV;

	}



	if (ver <= GSI_VER_ERR || ver >= GSI_VER_MAX) {

		GSIERR("Incorrect version %d\n", ver);

		return -GSI_STATUS_ERROR;

	}



	gsi_base = ioremap_nocache(gsi_base_addr, gsi_size);

	if (!gsi_base) {

		GSIERR("ioremap failed\n");
@@ -2921,7 +2935,7 @@ int gsi_configure_regs(phys_addr_t gsi_base_addr, u32 gsi_size, 
	gsi_writel(per_base_addr,

			gsi_base + GSI_GSI_PERIPH_BASE_ADDR_LSB_OFFS);

	gsi_configure_bck_prs_matrix((void *)gsi_base);

	gsi_configure_ieps(gsi_base);

	gsi_configure_ieps(gsi_base, ver);

	iounmap(gsi_base);



	return 0;

drivers/platform/msm/gsi/gsi_reg.h

+6 −0
Original line number Diff line number Diff line
@@ -604,6 +604,12 @@ 
#define GSI_GSI_IRAM_PTR_EE_GENERIC_CMD_IRAM_PTR_BMSK 0xfff

#define GSI_GSI_IRAM_PTR_EE_GENERIC_CMD_IRAM_PTR_SHFT 0x0



#define GSI_V2_5_GSI_IRAM_PTR_TLV_CH_NOT_FULL_OFFS \

	(GSI_GSI_REG_BASE_OFFS + 0x00000408)

#define GSI_V2_5_GSI_IRAM_PTR_TLV_CH_NOT_FULL_RMSK 0xfff

#define GSI_V2_5_GSI_IRAM_PTR_TLV_CH_NOT_FULL_IRAM_PTR_BMSK 0xfff

#define GSI_V2_5_GSI_IRAM_PTR_TLV_CH_NOT_FULL_IRAM_PTR_SHFT 0x0



#define GSI_GSI_IRAM_PTR_CH_DB_OFFS \

	(GSI_GSI_REG_BASE_OFFS + 0x00000418)

#define GSI_GSI_IRAM_PTR_CH_DB_RMSK 0xfff

drivers/platform/msm/ipa/ipa_v3/ipa.c

+16 −15
Original line number Diff line number Diff line
@@ -4421,21 +4421,6 @@ static void ipa3_trigger_ipa_ready_cbs(void) 
	mutex_unlock(&ipa3_ctx->lock);

}



static int ipa3_gsi_pre_fw_load_init(void)

{

	int result;



	result = gsi_configure_regs(ipa3_res.transport_mem_base,

		ipa3_res.transport_mem_size,

		ipa3_res.ipa_mem_base);

	if (result) {

		IPAERR("Failed to configure GSI registers\n");

		return -EINVAL;

	}



	return 0;

}



static void ipa3_uc_is_loaded(void)

{

	IPADBG("\n");
@@ -4478,6 +4463,22 @@ static enum gsi_ver ipa3_get_gsi_ver(enum ipa_hw_type ipa_hw_type) 
	return gsi_ver;

}



static int ipa3_gsi_pre_fw_load_init(void)

{

	int result;



	result = gsi_configure_regs(ipa3_res.transport_mem_base,

		ipa3_res.transport_mem_size,

		ipa3_res.ipa_mem_base,

		ipa3_get_gsi_ver(ipa3_res.ipa_hw_type));

	if (result) {

		IPAERR("Failed to configure GSI registers\n");

		return -EINVAL;

	}



	return 0;

}



/**

 * ipa3_post_init() - Initialize the IPA Driver (Part II).

 * This part contains all initialization which requires interaction with

include/linux/msm_gsi.h

+3 −2
Original line number Diff line number Diff line
@@ -1069,11 +1069,12 @@ int gsi_start_xfer(unsigned long chan_hdl); 
 * @gsi_base_addr: Base address of GSI register space

 * @gsi_size: Mapping size of the GSI register space

 * @per_base_addr: Base address of the peripheral using GSI

 * @ver: GSI core version

 *

 * @Return gsi_status

 */

int gsi_configure_regs(phys_addr_t gsi_base_addr, u32 gsi_size,

		phys_addr_t per_base_addr);

		phys_addr_t per_base_addr, enum gsi_ver ver);



/**

 * gsi_enable_fw - Peripheral should call this function
@@ -1308,7 +1309,7 @@ static inline int gsi_set_evt_ring_cfg(unsigned long evt_ring_hdl, 
}



static inline int gsi_configure_regs(phys_addr_t gsi_base_addr, u32 gsi_size,

		phys_addr_t per_base_addr)

		phys_addr_t per_base_addr, enum gsi_ver ver)

{

	return -GSI_STATUS_UNSUPPORTED_OP;

}