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Commit 34b8b0d1 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: update clock names as per latest driver"

parents 7325fbe3 2010354f
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+2 −2
Original line number Diff line number Diff line
@@ -196,7 +196,7 @@

		qcom,dsi-ctrl-num = <0>;
		qcom,dsi-phy-num = <0>;
		qcom,dsi-select-clocks = "src_byte_clk0", "src_pixel_clk0";
		qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";

		qcom,dsi-panel = <&dsi_ext_bridge_1080p>;
	};
@@ -210,7 +210,7 @@

		clocks = <&mdss_dsi0_pll BYTE0_MUX_CLK>,
			 <&mdss_dsi0_pll PIX0_MUX_CLK>;
		clock-names = "src_byte_clk0", "src_pixel_clk0";
		clock-names = "mux_byte_clk0", "mux_pixel_clk0";


		qcom,dsi-display-list =
+2 −2
Original line number Diff line number Diff line
@@ -270,7 +270,7 @@

		qcom,dsi-ctrl-num = <0>;
		qcom,dsi-phy-num = <0>;
		qcom,dsi-select-clocks = "src_byte_clk0", "src_pixel_clk0";
		qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";

		qcom,dsi-panel = <&dsi_ext_bridge_1080p>;
	};
@@ -284,7 +284,7 @@

		clocks = <&mdss_dsi0_pll BYTE0_MUX_CLK>,
			 <&mdss_dsi0_pll PIX0_MUX_CLK>;
		clock-names = "src_byte_clk0", "src_pixel_clk0";
		clock-names = "mux_byte_clk0", "mux_pixel_clk0";


		qcom,dsi-display-list =
+6 −6
Original line number Diff line number Diff line
@@ -527,7 +527,7 @@

		qcom,dsi-ctrl-num = <0>;
		qcom,dsi-phy-num = <0>;
		qcom,dsi-select-clocks = "src_byte_clk0", "src_pixel_clk0";
		qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";

		qcom,dsi-panel = <&dsi_ext_bridge_1080p>;
	};
@@ -539,7 +539,7 @@

		qcom,dsi-ctrl-num = <1>;
		qcom,dsi-phy-num = <1>;
		qcom,dsi-select-clocks = "src_byte_clk1", "src_pixel_clk1";
		qcom,dsi-select-clocks = "mux_byte_clk1", "mux_pixel_clk1";

		qcom,dsi-panel = <&dsi_ext_bridge_1080p>;
	};
@@ -555,8 +555,8 @@
			 <&mdss_dsi0_pll PCLK_MUX_0_CLK>,
			 <&mdss_dsi1_pll BYTECLK_MUX_1_CLK>,
			 <&mdss_dsi1_pll PCLK_MUX_1_CLK>;
		clock-names = "src_byte_clk0", "src_pixel_clk0",
			      "src_byte_clk1", "src_pixel_clk1";
		clock-names = "mux_byte_clk0", "mux_pixel_clk0",
			      "mux_byte_clk1", "mux_pixel_clk1";

		qcom,dsi-display-list =
			<&dsi_anx_7625_1>;
@@ -585,8 +585,8 @@
			 <&mdss_dsi0_pll PCLK_MUX_0_CLK>,
			 <&mdss_dsi1_pll BYTECLK_MUX_1_CLK>,
			 <&mdss_dsi1_pll PCLK_MUX_1_CLK>;
		clock-names = "src_byte_clk0", "src_pixel_clk0",
			      "src_byte_clk1", "src_pixel_clk1";
		clock-names = "mux_byte_clk0", "mux_pixel_clk0",
			      "mux_byte_clk1", "mux_pixel_clk1";

		qcom,dsi-display-list =
			<&dsi_anx_7625_2>;
+1 −2
Original line number Diff line number Diff line
@@ -507,8 +507,7 @@
&dsi_rm69298_truly_amoled_video {
	qcom,mdss-dsi-t-clk-post = <0x0D>;
	qcom,mdss-dsi-t-clk-pre = <0x30>;
	qcom,mdss-dsi-min-refresh-rate = <53>;
	qcom,mdss-dsi-max-refresh-rate = <60>;
	qcom,dsi-supported-dfps-list = <60 57 55>;
	qcom,mdss-dsi-pan-enable-dynamic-fps;
	qcom,mdss-dsi-pan-fps-update =
		"dfps_immediate_porch_mode_vfp";
+3 −3
Original line number Diff line number Diff line
@@ -179,7 +179,7 @@

		qcom,dsi-ctrl-num = <0>;
		qcom,dsi-phy-num = <0>;
		qcom,dsi-select-clocks = "src_byte_clk0", "src_pixel_clk0";
		qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";

		qcom,dsi-panel = <&dsi_td4330_truly_video>;
	};
@@ -190,7 +190,7 @@

		qcom,dsi-ctrl-num = <0>;
		qcom,dsi-phy-num = <0>;
		qcom,dsi-select-clocks = "src_byte_clk0", "src_pixel_clk0";
		qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";

		qcom,dsi-panel = <&dsi_td4330_truly_cmd>;
	};
@@ -201,7 +201,7 @@

		qcom,dsi-ctrl-num = <0>;
		qcom,dsi-phy-num = <0>;
		qcom,dsi-select-clocks = "src_byte_clk0", "src_pixel_clk0";
		qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";

		qcom,dsi-panel = <&dsi_sharp_split_link_wuxga_video>;
	};
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