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Commit 33ac2796 authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Ingo Molnar
Browse files

locking/barriers: Introduce smp_acquire__after_ctrl_dep() 



Introduce smp_acquire__after_ctrl_dep(), this construct is not
uncommon, but the lack of this barrier is.

Use it to better express smp_rmb() uses in WRITE_ONCE(), the IPC
semaphore code and the qspinlock code.

Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 1f03e8d2

include/linux/compiler.h

+12 −5
Original line number Diff line number Diff line
@@ -304,6 +304,17 @@ static __always_inline void __write_once_size(volatile void *p, void *res, int s 
	__u.__val;					\

})



/**

 * smp_acquire__after_ctrl_dep() - Provide ACQUIRE ordering after a control dependency

 *

 * A control dependency provides a LOAD->STORE order, the additional RMB

 * provides LOAD->LOAD order, together they provide LOAD->{LOAD,STORE} order,

 * aka. (load)-ACQUIRE.

 *

 * Architectures that do not do load speculation can have this be barrier().

 */

#define smp_acquire__after_ctrl_dep()		smp_rmb()



/**

 * smp_cond_load_acquire() - (Spin) wait for cond with ACQUIRE ordering

 * @ptr: pointer to the variable to wait on
@@ -314,10 +325,6 @@ static __always_inline void __write_once_size(volatile void *p, void *res, int s 
 *

 * Due to C lacking lambda expressions we load the value of *ptr into a

 * pre-named variable @VAL to be used in @cond.

 *

 * The control dependency provides a LOAD->STORE order, the additional RMB

 * provides LOAD->LOAD order, together they provide LOAD->{LOAD,STORE} order,

 * aka. ACQUIRE.

 */

#ifndef smp_cond_load_acquire

#define smp_cond_load_acquire(ptr, cond_expr) ({		\
@@ -329,7 +336,7 @@ static __always_inline void __write_once_size(volatile void *p, void *res, int s 
			break;					\

		cpu_relax();					\

	}							\

	smp_rmb(); /* ctrl + rmb := acquire */			\

	smp_acquire__after_ctrl_dep();				\

	VAL;							\

})

#endif

ipc/sem.c

+2 −12
Original line number Diff line number Diff line
@@ -259,16 +259,6 @@ static void sem_rcu_free(struct rcu_head *head) 
	ipc_rcu_free(head);

}



/*

 * spin_unlock_wait() and !spin_is_locked() are not memory barriers, they

 * are only control barriers.

 * The code must pair with spin_unlock(&sem->lock) or

 * spin_unlock(&sem_perm.lock), thus just the control barrier is insufficient.

 *

 * smp_rmb() is sufficient, as writes cannot pass the control barrier.

 */

#define ipc_smp_acquire__after_spin_is_unlocked()	smp_rmb()



/*

 * Wait until all currently ongoing simple ops have completed.

 * Caller must own sem_perm.lock.
@@ -292,7 +282,7 @@ static void sem_wait_array(struct sem_array *sma) 
		sem = sma->sem_base + i;

		spin_unlock_wait(&sem->lock);

	}

	ipc_smp_acquire__after_spin_is_unlocked();

	smp_acquire__after_ctrl_dep();

}



/*
@@ -350,7 +340,7 @@ static inline int sem_lock(struct sem_array *sma, struct sembuf *sops, 
			 *	complex_count++;

			 *	spin_unlock(sem_perm.lock);

			 */

			ipc_smp_acquire__after_spin_is_unlocked();

			smp_acquire__after_ctrl_dep();



			/*

			 * Now repeat the test of complex_count:

kernel/locking/qspinlock.c

+1 −1
Original line number Diff line number Diff line
@@ -379,7 +379,7 @@ void queued_spin_unlock_wait(struct qspinlock *lock) 
		cpu_relax();



done:

	smp_rmb(); /* CTRL + RMB -> ACQUIRE */

	smp_acquire__after_ctrl_dep();

}

EXPORT_SYMBOL(queued_spin_unlock_wait);

#endif