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Commit 321f72d4 authored by Deepak Katragadda's avatar Deepak Katragadda Committed by Gerrit - the friendly Code Review server
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clk: qcom: Update the PLL configurations on SDM855



Update the PLL configurations to also contain the config, user_ctl,
and test_ctl settings for the various PLLs that APPS controls.

Change-Id: Ic67e6bc3a37b2889c0396dcdf9a8000e3326dfad
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent 1c4b4db0
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+34 −4
Original line number Diff line number Diff line
/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -130,8 +130,14 @@ static struct pll_vco trion_vco[] = {
};

static const struct alpha_pll_config cam_cc_pll0_config = {
	.l = 0x3e,
	.l = 0x3E,
	.alpha = 0x8000,
	.config_ctl_val = 0x20485699,
	.config_ctl_hi_val = 0x00002267,
	.config_ctl_hi1_val = 0x00000024,
	.user_ctl_val = 0x00000000,
	.user_ctl_hi_val = 0x00000805,
	.user_ctl_hi1_val = 0x000000D0,
};

static struct clk_alpha_pll cam_cc_pll0 = {
@@ -205,6 +211,12 @@ static struct clk_alpha_pll_postdiv cam_cc_pll0_out_odd = {
static const struct alpha_pll_config cam_cc_pll1_config = {
	.l = 0x13,
	.alpha = 0x8800,
	.config_ctl_val = 0x20485699,
	.config_ctl_hi_val = 0x00002267,
	.config_ctl_hi1_val = 0x00000024,
	.user_ctl_val = 0x00000000,
	.user_ctl_hi_val = 0x00000805,
	.user_ctl_hi1_val = 0x000000D0,
};

static struct clk_alpha_pll cam_cc_pll1 = {
@@ -247,6 +259,12 @@ static struct clk_alpha_pll_postdiv cam_cc_pll1_out_even = {
static const struct alpha_pll_config cam_cc_pll2_config = {
	.l = 0x32,
	.alpha = 0x0,
	.config_ctl_val = 0x10000927,
	.config_ctl_hi_val = 0x00000011,
	.config_ctl_hi1_val = 0x04300142,
	.test_ctl_val = 0x00000000,
	.test_ctl_hi_val = 0x00004000,
	.test_ctl_hi1_val = 0x00000000,
};

static struct clk_alpha_pll cam_cc_pll2 = {
@@ -297,7 +315,13 @@ static struct clk_alpha_pll_postdiv cam_cc_pll2_out_main = {

static const struct alpha_pll_config cam_cc_pll3_config = {
	.l = 0x14,
	.alpha = 0xd555,
	.alpha = 0xD555,
	.config_ctl_val = 0x20485699,
	.config_ctl_hi_val = 0x00002267,
	.config_ctl_hi1_val = 0x00000024,
	.user_ctl_val = 0x00000000,
	.user_ctl_hi_val = 0x00000805,
	.user_ctl_hi1_val = 0x000000D0,
};

static struct clk_alpha_pll cam_cc_pll3 = {
@@ -339,7 +363,13 @@ static struct clk_alpha_pll_postdiv cam_cc_pll3_out_even = {

static const struct alpha_pll_config cam_cc_pll4_config = {
	.l = 0x14,
	.alpha = 0xd555,
	.alpha = 0xD555,
	.config_ctl_val = 0x20485699,
	.config_ctl_hi_val = 0x00002267,
	.config_ctl_hi1_val = 0x00000024,
	.user_ctl_val = 0x00000000,
	.user_ctl_hi_val = 0x00000805,
	.user_ctl_hi1_val = 0x000000D0,
};

static struct clk_alpha_pll cam_cc_pll4 = {
+15 −3
Original line number Diff line number Diff line
/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -172,7 +172,13 @@ static struct pll_vco trion_vco[] = {

static const struct alpha_pll_config disp_cc_pll0_config = {
	.l = 0x47,
	.alpha = 0xe000,
	.alpha = 0xE000,
	.config_ctl_val = 0x20485699,
	.config_ctl_hi_val = 0x00002267,
	.config_ctl_hi1_val = 0x00000024,
	.user_ctl_val = 0x00000000,
	.user_ctl_hi_val = 0x00000805,
	.user_ctl_hi1_val = 0x000000D0,
};

static struct clk_alpha_pll disp_cc_pll0 = {
@@ -198,8 +204,14 @@ static struct clk_alpha_pll disp_cc_pll0 = {
};

static const struct alpha_pll_config disp_cc_pll1_config = {
	.l = 0x1f,
	.l = 0x1F,
	.alpha = 0x4000,
	.config_ctl_val = 0x20485699,
	.config_ctl_hi_val = 0x00002267,
	.config_ctl_hi1_val = 0x00000024,
	.user_ctl_val = 0x00000000,
	.user_ctl_hi_val = 0x00000805,
	.user_ctl_hi1_val = 0x000000D0,
};

static struct clk_alpha_pll disp_cc_pll1 = {
+15 −3
Original line number Diff line number Diff line
/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -72,8 +72,14 @@ static struct pll_vco trion_vco[] = {
};

static const struct alpha_pll_config npu_cc_pll0_config = {
	.l = 0x48,
	.alpha = 0xeaaa,
	.l = 0x3E,
	.alpha = 0x8000,
	.config_ctl_val = 0x20485699,
	.config_ctl_hi_val = 0x00002267,
	.config_ctl_hi1_val = 0x00000024,
	.user_ctl_val = 0x00000000,
	.user_ctl_hi_val = 0x00000805,
	.user_ctl_hi1_val = 0x000000D0,
};

static struct clk_alpha_pll npu_cc_pll0 = {
@@ -124,6 +130,12 @@ static struct clk_alpha_pll_postdiv npu_cc_pll0_out_even = {
static const struct alpha_pll_config npu_cc_pll1_config = {
	.l = 0x24,
	.alpha = 0x7555,
	.config_ctl_val = 0x20485699,
	.config_ctl_hi_val = 0x00002267,
	.config_ctl_hi1_val = 0x00000024,
	.user_ctl_val = 0x00000000,
	.user_ctl_hi_val = 0x00000805,
	.user_ctl_hi1_val = 0x000000D0,
};

static struct clk_alpha_pll npu_cc_pll1 = {
+9 −2
Original line number Diff line number Diff line
/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -42,6 +42,7 @@ static DEFINE_VDD_REGULATORS(vdd_mm, VDD_NUM, 1, vdd_corner);

enum {
	P_BI_TCXO,
	P_CHIP_SLEEP_CLK,
	P_CORE_BI_PLL_TEST_SE,
	P_VIDEO_PLL0_OUT_EVEN,
	P_VIDEO_PLL0_OUT_MAIN,
@@ -70,7 +71,13 @@ static struct pll_vco trion_vco[] = {

static const struct alpha_pll_config video_pll0_config = {
	.l = 0x14,
	.alpha = 0xd555,
	.alpha = 0xD555,
	.config_ctl_val = 0x20485699,
	.config_ctl_hi_val = 0x00002267,
	.config_ctl_hi1_val = 0x00000024,
	.user_ctl_val = 0x00000000,
	.user_ctl_hi_val = 0x00000805,
	.user_ctl_hi1_val = 0x000000D0,
};

static struct clk_alpha_pll video_pll0 = {