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Commit 320f1ac0 authored by Namratha Siddappa's avatar Namratha Siddappa
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Merge remote-tracking branch 'quic/msm-4.14' into dev/msm-4.14-display 



* quic/msm-4.14:
  msm: driver to create cld80211 nl family at bootup time
  spmi: spmi-pmic-arb-debug: Change the probe init order
  cfg80211: fix CAC_STARTED event handling
  cfg80211/nl80211: add CAC_STARTED event
  msm:ipa3: fix the header table gap issue
  ARM: dts: msm: Add device tree for SA8150P-adp-star
  rpmh_master_stat: Correctly initialize rpmh_unit_base
  defconfig: Enable page_owner for sdmsteppe on perf config
  msm: ipa: wdi: Add a boolean flag to represent wdi tx over pcie
  defconfig: Enable page_owner for sdmshrike on perf config
  of: reserved_mem: Fix kmemleak crash on no-map region
  defconfig: arm/arm64: add smmu config for secure usecases on qcs405
  ARM: dts: msm: enable graphics smmu on qcs405
  msm: msm_bus: Change the init level for bus scaling driver
  scsi: ufs: Initiate crypto before SCSI for UFS fast boot
  sched: remove skip_sg
  sched: improve trace prints
  ARM: dts: msm: add charger/smb temp_max properties for PM8150B
  power: smb5: add support to configure charger temp_max
  cfg80211: Scan results to also report the per chain signal strength
  msm: vidc: Increase input buffer size
  msm: vidc: Amend input buffer count in batch mode
  ARM: dts: msm: Add NPU QDSS related clocks for sm8150
  msm: npu: Enable npu cti/apb/atb/perf_cnt clocks
  power: qpnp-fg-gen4: Update default cutoff voltage to 3.1 V
  power: qpnp-fg-gen4: Fix Rslow compensation workaround
  ARM: dts: msm: Update alium battery profile for SM8150 platforms
  msm: ipa3: fix hdr offset issue
  memshare: Conditional free the clients allotted memory
  perf: don't zombie certain events in perf_event_release_kernel
  defconfig: qcs405: Enable watchdog configs for QCS405
  ARM: dts: msm: Add master crypto property in pil nodes for qcs405
  soc: qcom: pil: get crypto cell-id through device tree
  ARM: dts: msm: Enable ADSP audio PDR for sm8150
  iommu/arm-smmu: fix issue by devm_free_irq on cb interrupt line
  msm: ADSPRPC: Enable Audio PDR support
  cfg80211: fix rcu in cfg80211_unregister_wdev
  platform: qpnp-revid: Add REVID support for SM6150
  ARM: dts: msm: add DCC clocks for qcs405
  defconfig: arm/arm64: enable memory debug configs on qcs405
  msm: gsi: Adapt GSI registers to support GSI version 2.5
  Revert "mm: memory: reduce fault_around_bytes"
  clk: qcom: mdss: add support for DSI 28LPM PLL
  Revert "input: touchscreen: shutdown ST touch's  power supply when suspend"
  ARM: dts: msm: Add USB DLOAD cookie device node on QCS405
  mm: prevent to write out dirty page in CMA by may_writepage
  mm: vmpressure: allow in-kernel clients to subscribe for events
  ARM: dts: msm: Add UFS support for sm6150
  defconfig: arm: msm: Enable memshare driver on sm8150
  ARM: dts: msm: Add memshare for sm8150
  drivers: cpuidle: lpm-levels: Correctly check for list empty
  ARM: dts: msm: Update LPM parameters for sm8150
  msm: ipa4: fix client register and deregister for usb
  msm: ipa4: initialize IPAHAL at ipa_pre_init()
  msm: ipa: support ipacm cleanup
  soc: qcom: Add support for sa8150p into socinfo driver
  ARM: dts: msm: fix machine display name
  cpu-hotplug: Fix the cpus_write_lock usage
  msm: ipa: gsi: mhi: Configure appropriate polling mode bit for MHI ep
  clk: qcom: Update BCR address to spare register
  ARM: dts: msm: Disable chd support for QCS405
  iommu: arm-smmu: Add error message for hibernation usecase
  iommu: arm-smmu: Add PM support for actlr register
  iommu: arm-smmu: Restore missing call to arm_smmu_write_context_bank
  driver_core: Avoid NULL dereference when CONFIG_OF_KOBJ=n
  of: Make CONFIG_OF_KOBJ configurable
  msm: kgsl: Don't reset HFI indexes on reset
  msm: kgsl: Only look at enabled HFI queues
  msm: kgsl: Disable interrupts before stopping HFI
  power: smb5: Disable SMB thermal regulation
  power: smb5-lib: Fix Type-C CTM status
  ARM: dts: msm: Add support for AOP clocks for SDMMAGPIE
  ion: msm: Add support for VMID_CP_CDSP
  ion: carveout: Add secure carveout heap type
  msm vidc : Fix memory leak in venus_hfi_core_init()
  defconfig: sdxprairie: Enable SMMU driver for sdxprairie
  iommu: arm-smmu: Remove sysfs bind/unbind files
  msm: vidc: Fix corruption in bus vote
  msm: kgsl: Fix gmu & hfi irq remove failures
  defconfig: msm: Create symlinks for sdmsteppe defconfigs
  usb: dwc3: gadget: delay clearing run/stop when setup just arrived
  msm: kgsl: Update CP ROQ size for a640 and a680
  ARM: dts: msm: Include SMMU DT changes for sdxprairie
  msm: kgsl: Add A640v2 to the GPU list

Change-Id: Ia8f1005692ecb11380e8ff58973808127791c81c
Signed-off-by: default avatarNamratha Siddappa <namratha@codeaurora.org>
parents 4126e402 85e2fd95

Documentation/devicetree/bindings/arm/msm/msm.txt

+1 −0
Original line number Diff line number Diff line
@@ -164,6 +164,7 @@ compatible = "qcom,qcs405-rumi" 
compatible = "qcom,qcs405-iot"

compatible = "qcom,qcs403-iot"

compatible = "qcom,sa8150-adp-star"

compatible = "qcom,sa8150p-adp-star"

compatible = "qcom,adp-star"

compatible = "qcom,sdxprairie-rumi"

compatible = "qcom,sdxprairie-mtp"

Documentation/devicetree/bindings/arm/msm/msm_ion.txt

+31 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ Required properties for Ion heaps 
  the following:

    - "SYSTEM"

    - "CARVEOUT"

    - "SECURE_CARVEOUT"

    - "DMA"

    - "HYP_CMA"

    - "SYSTEM_SECURE"
@@ -28,6 +29,7 @@ Optional properties for Ion heaps 


- memory-region: phandle to memory region associated with heap.





Example:

	qcom,ion {

                 compatible = "qcom,msm-ion";
@@ -57,3 +59,32 @@ Example: 
                 };



        };



"SECURE_CARVEOUT"



This heap type is expected to contain multiple child nodes. Each child node

shall contain the following required properties:



- memory-region:

Refer to Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt



- token:

A u32 containing the set of secure domains which will be able to access the

memory-region.



Example:

qcom,ion {

	compatible = "qcom,msm-ion";

	#address-cells = <1>;

	#size-cells = <0>;



	qcom,ion-heap@14 {

		reg = <14>;

		qcom,ion-heap-type = "SECURE_CARVEOUT";



		node1 {

			memory-region = <&cp_region>;

			token = <ION_FLAG_CP_TOUCH>;

		};

	};

};

Documentation/devicetree/bindings/fb/mdss-pll.txt

+16 −12
Original line number Diff line number Diff line 
Qualcomm Technologies, Inc. MDSS pll for DSI/EDP/HDMI



mdss-pll is a pll controller device which supports pll devices that are

compatiable with MIPI display serial interface specification, HDMI and edp.

mdss-pll is a pll controller device which supports pll devices that

are compatible with MIPI display serial interface specification,

HDMI and edp.



Required properties:

- compatible:		Compatible name used in the driver. Should be one of:
@@ -12,9 +13,12 @@ Required properties: 
                        "qcom,mdss_dsi_pll_8992", "qcom,mdss_hdmi_pll_8992",

                        "qcom,mdss_dsi_pll_8996", "qcom,mdss_hdmi_pll_8996",

                        "qcom,mdss_hdmi_pll_8996_v2", "qcom,mdss_dsi_pll_8996_v2",

			"qcom,mdss_hdmi_pll_8996_v3", "qcom,mdss_dsi_pll_8952",

			"qcom,mdss_dsi_pll_8937", "qcom,mdss_hdmi_pll_8996_v3_1p8",

			"qcom,mdss_dsi_pll_8953"

                        "qcom,mdss_hdmi_pll_8996_v3", "qcom,mdss_hdmi_pll_8996_v3_1p8",

                        "qcom,mdss_edp_pll_8996_v3",  "qcom,mdss_edp_pll_8996_v3_1p8",

                        "qcom,mdss_dsi_pll_10nm",  "qcom,mdss_dp_pll_8998",

                        "qcom,mdss_hdmi_pll_8998", "qcom,mdss_dp_pll_10nm",

                        "qcom,mdss_dsi_pll_7nm",   "qcom,mdss_dp_pll_7nm",

			"qcom,mdss_dsi_pll_28lpm"

- cell-index:		Specifies the controller used

- reg:			offset and length of the register set for the device.

- reg-names :		names to refer to register sets related to this device

Documentation/devicetree/bindings/pil/subsys-pil-tz.txt

+1 −0
Original line number Diff line number Diff line
@@ -71,6 +71,7 @@ Optional properties: 
- qcom,signal-aop: Boolean. If set, when subsystem is brought up, pil will send a notification

			to AOP through qmp mailbox driver.



- qcom,mas-crypto: phandle to the bus master of crypto core.



Example:

	qcom,venus@fdce0000 {

Documentation/devicetree/bindings/platform/msm/ipa.txt

+2 −0
Original line number Diff line number Diff line
@@ -89,6 +89,8 @@ memory allocation over a PCIe bridge 
                                monitoring of holb via IPA uc is required.

-qcom,ipa-fltrt-not-hashable:   Boolean context flag to indicate filter/route rules

				hashing not supported.

- qcom,wlan-ce-db-over-pcie: Boolean context flag to represent WLAN CE DB

				over pcie bus or not.



IPA pipe sub nodes (A2 static pipes configurations):