Merge "ARM: dts: msm: Add qrng node for atoll"

		mbox-names = "aop";

	};

	qcom_tzlog: tz-log@146aa720 {

		compatible = "qcom,tz-log";

		reg = <0x146aa720 0x3000>;

		qcom,hyplog-enabled;

		hyplog-address-offset = <0x410>;

		hyplog-size-offset = <0x414>;

	};

	qcom_rng: qrng@793000 {

		compatible = "qcom,msm-rng";

		reg = <0x793000 0x1000>;

		qcom,msm-rng-iface-clk;

		qcom,no-qrng-config;

		qcom,msm-bus,name = "msm-rng-noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<1 618 0 0>,    /* No vote */

			<1 618 0 300000>;  /* 75 MHz */

		clocks = <&clock_gcc GCC_PRNG_AHB_CLK>;

		clock-names = "iface_clk";

	};

	qcom_crypto: qcrypto@1de0000 {

		compatible = "qcom,qcrypto";

		reg = <0x1de0000 0x20000>,

			<0x1dc4000 0x24000>;

		reg-names = "crypto-base","crypto-bam-base";

		interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;

		qcom,bam-pipe-pair = <2>;

		qcom,ce-hw-instance = <0>;

		qcom,ce-device = <0>;

		qcom,bam-ee = <0>;

		qcom,ce-hw-shared;

		qcom,clk-mgmt-sus-res;

		qcom,msm-bus,name = "qcrypto-noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<125 512 0 0>,

			<125 512 393600 393600>;

		qcom,use-sw-aes-cbc-ecb-ctr-algo;

		qcom,use-sw-aes-xts-algo;

		qcom,use-sw-aes-ccm-algo;

		qcom,use-sw-ahash-algo;

		qcom,use-sw-aead-algo;

		qcom,use-sw-hmac-algo;

		qcom,smmu-s1-enable;

		qcom,no-clock-support;

		iommus = <&apps_smmu 0x0424 0x0011>,

			<&apps_smmu 0x0434 0x0011>;

	};

	qcom_cedev: qcedev@1de0000 {

		compatible = "qcom,qcedev";

		reg = <0x1de0000 0x20000>,

			<0x1dc4000 0x24000>;

		reg-names = "crypto-base","crypto-bam-base";

		interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;

		qcom,bam-pipe-pair = <3>;

		qcom,ce-hw-instance = <0>;

		qcom,ce-device = <0>;

		qcom,ce-hw-shared;

		qcom,bam-ee = <0>;

		qcom,msm-bus,name = "qcedev-noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<125 512 0 0>,

			<125 512 393600 393600>;

		qcom,smmu-s1-enable;

		qcom,no-clock-support;

		iommus = <&apps_smmu 0x0426 0x0011>,

			<&apps_smmu 0x0436 0x0011>;

	};

	qcom,msm-rtb {

		compatible = "qcom,msm-rtb";

		qcom,rtb-size = <0x100000>;