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Commit 3008f900 authored by Runmin Wang's avatar Runmin Wang
Browse files

ARM: dts: msm: Add clocks for NPU on sdm855 



Add all required clocks to bring NPU out of reset.

Change-Id: Ia5e1f38b789b0e64bc96a4edb5da599cbf83d513
Signed-off-by: default avatarRunmin Wang <runminw@codeaurora.org>
parent 0f02818b

arch/arm64/boot/dts/qcom/sdm855.dtsi

+23 −7
Original line number Diff line number Diff line
@@ -1016,15 +1016,31 @@ 
		reg = <0x9800000 0x800000>;



		clocks = <&clock_npucc NPU_CC_XO_CLK>,

			<&clock_npucc NPU_CC_NPU_CORE_CLK>,

			<&clock_npucc NPU_CC_CAL_DP_CLK>,

			<&clock_npucc NPU_CC_ARMWIC_CORE_CLK>,

			<&clock_npucc NPU_CC_CAL_DP_CLK_SRC>,

			<&clock_npucc NPU_CC_CAL_DP_CLK>,

			<&clock_npucc NPU_CC_CAL_DP_CDC_CLK>,

			<&clock_npucc NPU_CC_SLEEP_CLK>,

			<&clock_npucc NPU_CC_COMP_NOC_AXI_CLK>,

			<&clock_npucc NPU_CC_CONF_NOC_AHB_CLK>;

		clock-names = "xo", "core", "cal_dp", "armwic",

				"axi", "ahb";

		qcom,proxy-clock-names = "xo", "core", "cal_dp",

				"armwic","axi", "ahb";

			<&clock_npucc NPU_CC_CONF_NOC_AHB_CLK>,

			<&clock_npucc NPU_CC_NPU_CORE_CLK_SRC>,

			<&clock_npucc NPU_CC_NPU_CORE_CLK>,

			<&clock_npucc NPU_CC_NPU_CORE_APB_CLK>,

			<&clock_npucc NPU_CC_NPU_CORE_ATB_CLK>,

			<&clock_npucc NPU_CC_NPU_CORE_CTI_CLK>,

			<&clock_npucc NPU_CC_BWMON_CLK>,

			<&clock_npucc NPU_CC_QTIMER_CORE_CLK>,

			<&clock_npucc NPU_CC_BTO_CORE_CLK>;



		clock-names = "xo", "armwic", "cal_dp_src", "cal_dp",

			"cal_dp_cdc", "sleep", "noc_axi", "noc_ahb",

			"core_src", "core", "apb", "atb", "cti", "bwmon",

			"qtimer", "bto";



		qcom,proxy-clock-names = "xo", "armwic", "cal_dp_src", "cal_dp",

			"cal_dp_cdc", "sleep", "noc_axi", "noc_ahb",

			"core_src", "core", "apb", "atb", "cti", "bwmon",

			"qtimer", "bto";



		vdd-supply = <&npu_core_gdsc>;

		vdd_cx-supply = <&pm855l_s6_level>;