ARM: OMAP2+: Make INTCPS_NR_IRQS local for mach-omap2/irq.c

#define OMAP3_IRQ_BASE		OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)

#define INTCPS_SIR_IRQ_OFFSET	0x0040	/* omap2/3 active interrupt offset */

#define ACTIVEIRQ_MASK		0x7f	/* omap2/3 active interrupt bits */

#define INTCPS_NR_MIR_REGS	3

#define INTCPS_NR_IRQS		96

/*

 * OMAP2 has a number of different interrupt controllers, each interrupt

#define OMAP_IRQ_BIT(irq)	(1 << ((irq) % 32))

#define INTCPS_NR_MIR_REGS	3

#define INTCPS_NR_IRQS		96

#include <mach/hardware.h>

#ifdef CONFIG_FIQ