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Commit 2fc8c6bf authored by Viswanadha Raju Thotakura's avatar Viswanadha Raju Thotakura
Browse files

msm: camera: Change reset sequence for CSID 



In the case of CSID reset, split the global reset command to
perform non sw register reset and sw register reset.
Add delay of 3msec for hardware to complete the global reset.

Change-Id: I0525c253c0b63fdcd76a774ada197532cd9b1c08
Signed-off-by: default avatarViswanadha Raju Thotakura <viswanad@codeaurora.org>
parent b048651c

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid170.h

+1 −0
Original line number Diff line number Diff line
@@ -274,6 +274,7 @@ static struct cam_ife_csid_common_reg_offset 
	.num_rdis                                     = 3,

	.num_pix                                      = 1,

	.num_ppp                                      = 0,

	.csid_reg_rst_stb                             = 1,

	.csid_rst_stb                                 = 0x1e,

	.csid_rst_stb_sw_all                          = 0x1f,

	.path_rst_stb_all                             = 0x7f,

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid175.h

+1 −0
Original line number Diff line number Diff line
@@ -315,6 +315,7 @@ static struct cam_ife_csid_common_reg_offset 
	.num_rdis                                     = 3,

	.num_pix                                      = 1,

	.num_ppp                                      = 1,

	.csid_reg_rst_stb                             = 1,

	.csid_rst_stb                                 = 0x1e,

	.csid_rst_stb_sw_all                          = 0x1f,

	.path_rst_stb_all                             = 0x7f,

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid175_200.h

+1 −0
Original line number Diff line number Diff line
@@ -331,6 +331,7 @@ static struct cam_ife_csid_common_reg_offset 
	.num_rdis                                     = 3,

	.num_pix                                      = 1,

	.num_ppp                                      = 1,

	.csid_reg_rst_stb                             = 1,

	.csid_rst_stb                                 = 0x1e,

	.csid_rst_stb_sw_all                          = 0x1f,

	.path_rst_stb_all                             = 0x7f,

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c

+18 −2
Original line number Diff line number Diff line
@@ -430,8 +430,23 @@ static int cam_ife_csid_global_reset(struct cam_ife_csid_hw *csid_hw) 
		cam_io_w_mb(0x2, soc_info->reg_map[0].mem_base +

			csid_reg->rdi_reg[i]->csid_rdi_cfg0_addr);



	/* perform the top CSID HW and SW registers reset */

	cam_io_w_mb(csid_reg->cmn_reg->csid_rst_stb_sw_all,

	/* perform the top CSID HW registers reset */

	cam_io_w_mb(csid_reg->cmn_reg->csid_rst_stb,

		soc_info->reg_map[0].mem_base +

		csid_reg->cmn_reg->csid_rst_strobes_addr);



	rc = readl_poll_timeout(soc_info->reg_map[0].mem_base +

		csid_reg->cmn_reg->csid_top_irq_status_addr,

			status, (status & 0x1) == 0x1,

		CAM_IFE_CSID_TIMEOUT_SLEEP_US, CAM_IFE_CSID_TIMEOUT_ALL_US);

	if (rc < 0) {

		CAM_ERR(CAM_ISP, "CSID:%d csid_reset fail rc = %d",

			  csid_hw->hw_intf->hw_idx, rc);

		rc = -ETIMEDOUT;

	}



	/* perform the SW registers reset */

	cam_io_w_mb(csid_reg->cmn_reg->csid_reg_rst_stb,

		soc_info->reg_map[0].mem_base +

		csid_reg->cmn_reg->csid_rst_strobes_addr);
@@ -445,6 +460,7 @@ static int cam_ife_csid_global_reset(struct cam_ife_csid_hw *csid_hw) 
		rc = -ETIMEDOUT;

	}



	usleep_range(3000, 3010);

	val = cam_io_r_mb(soc_info->reg_map[0].mem_base +

		csid_reg->csi2_reg->csid_csi2_rx_irq_mask_addr);

	if (val != 0)

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.h

+1 −0
Original line number Diff line number Diff line
@@ -290,6 +290,7 @@ struct cam_ife_csid_common_reg_offset { 
	uint32_t num_rdis;

	uint32_t num_pix;

	uint32_t num_ppp;

	uint32_t csid_reg_rst_stb;

	uint32_t csid_rst_stb;

	uint32_t csid_rst_stb_sw_all;

	uint32_t path_rst_stb_all;