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Commit 2ec5f69d authored by Subbaraman Narayanamurthy's avatar Subbaraman Narayanamurthy
Browse files

power: qpnp-fg-gen4: Fix battery temperature delta configuration 



Currently, battery temperature delta configuration is allowed for
an incorrect limit. Fix it. Also, add a proper check to allow
temperature hysteresis configuration correctly as it also adds
a dependency to battery temperature delta interrupt. Update the
device tree bindings documentation as well.

CRs-Fixed: 2336539
Change-Id: I916138e8d87b5497abe0a8777a9145471324e260
Signed-off-by: default avatarSubbaraman Narayanamurthy <subbaram@codeaurora.org>
parent 81ecb311

Documentation/devicetree/bindings/power/supply/qcom/qpnp-fg-gen4.txt

+2 −4
Original line number Diff line number Diff line
@@ -186,10 +186,8 @@ First Level Node - FG Gen4 device 
- qcom,fg-batt-temp-hyst

	Usage:      optional

	Value type: <u32>

	Definition: Battery temperature hysteresis threshold. This will be

		    applicable only if the cold and hot thresholds are

		    specified. Possible values are: 0, 1, 2 and 3. Unit is in

		    Kelvin or Celsius.

	Definition: Battery temperature hysteresis threshold. Possible values

		    are: 0, 1, 2 and 3. Unit is in Kelvin or Celsius.



- qcom,fg-force-load-profile

	Usage:      optional

drivers/power/supply/qcom/qpnp-fg-gen4.c

+12 −16
Original line number Diff line number Diff line
@@ -3911,20 +3911,16 @@ static int fg_gen4_hw_init(struct fg_gen4_chip *chip) 
	}



	if (chip->dt.batt_temp_hyst != -EINVAL) {

		if (chip->dt.batt_temp_cold_thresh != -EINVAL &&

			chip->dt.batt_temp_hot_thresh != -EINVAL) {

		val = chip->dt.batt_temp_hyst & BATT_TEMP_HYST_MASK;

		mask = BATT_TEMP_HYST_MASK;

		rc = fg_sram_masked_write(fg, BATT_TEMP_CONFIG2_WORD,

				BATT_TEMP_HYST_DELTA_OFFSET, mask, val,

				FG_IMA_DEFAULT);

		if (rc < 0) {

				pr_err("Error in writing batt_temp_hyst, rc=%d\n",

					rc);

			pr_err("Error in writing batt_temp_hyst, rc=%d\n", rc);

			return rc;

		}

	}

	}



	if (chip->dt.batt_temp_delta != -EINVAL) {

		val = (chip->dt.batt_temp_delta << BATT_TEMP_DELTA_SHIFT)
@@ -4305,8 +4301,8 @@ static int fg_parse_esr_cal_params(struct fg_dev *fg) 
#define DEFAULT_CL_MAX_DEC_DECIPERC	100

#define DEFAULT_CL_MIN_LIM_DECIPERC	0

#define DEFAULT_CL_MAX_LIM_DECIPERC	0

#define BTEMP_DELTA_LOW			2

#define BTEMP_DELTA_HIGH		10

#define BTEMP_DELTA_LOW			0

#define BTEMP_DELTA_HIGH		3

#define DEFAULT_ESR_PULSE_THRESH_MA	47

#define DEFAULT_ESR_MEAS_CURR_MA	120

static int fg_gen4_parse_dt(struct fg_gen4_chip *chip)
@@ -4522,13 +4518,13 @@ static int fg_gen4_parse_dt(struct fg_gen4_chip *chip) 
	rc = of_property_read_u32(node, "qcom,fg-batt-temp-hyst", &temp);

	if (rc < 0)

		chip->dt.batt_temp_hyst = -EINVAL;

	else

	else if (temp >= BTEMP_DELTA_LOW && temp <= BTEMP_DELTA_HIGH)

		chip->dt.batt_temp_hyst = temp;



	rc = of_property_read_u32(node, "qcom,fg-batt-temp-delta", &temp);

	if (rc < 0)

		chip->dt.batt_temp_delta = -EINVAL;

	else if (temp > BTEMP_DELTA_LOW && temp <= BTEMP_DELTA_HIGH)

	else if (temp >= BTEMP_DELTA_LOW && temp <= BTEMP_DELTA_HIGH)

		chip->dt.batt_temp_delta = temp;



	chip->dt.hold_soc_while_full = of_property_read_bool(node,