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Commit 2e3b3b10 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon: only adjust default clocks on NI GPUs 



SI asics store voltage information differently so we
don't have a way to deal with it properly yet.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent c0fd0834

drivers/gpu/drm/radeon/radeon_pm.c

+6 −2
Original line number Diff line number Diff line
@@ -521,7 +521,9 @@ void radeon_pm_suspend(struct radeon_device *rdev) 
void radeon_pm_resume(struct radeon_device *rdev)

{

	/* set up the default clocks if the MC ucode is loaded */

	if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) {

	if ((rdev->family >= CHIP_BARTS) &&

	    (rdev->family <= CHIP_CAYMAN) &&

	    rdev->mc_fw) {

		if (rdev->pm.default_vddc)

			radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,

						SET_VOLTAGE_TYPE_ASIC_VDDC);
@@ -576,7 +578,9 @@ int radeon_pm_init(struct radeon_device *rdev) 
		radeon_pm_print_states(rdev);

		radeon_pm_init_profile(rdev);

		/* set up the default clocks if the MC ucode is loaded */

		if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) {

		if ((rdev->family >= CHIP_BARTS) &&

		    (rdev->family <= CHIP_CAYMAN) &&

		    rdev->mc_fw) {

			if (rdev->pm.default_vddc)

				radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,

							SET_VOLTAGE_TYPE_ASIC_VDDC);