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Commit 2d2a5bb4 authored by Deepak Katragadda's avatar Deepak Katragadda
Browse files

clk: qcom: gcc-sdm855: Add debug measurement support for shared clocks 



Add support to measure the rate of shared clock resources that
the Linux clock driver does not control directly.

Change-Id: Ib49bd0683067967821beb4b03bf094a3d8bd327c
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent 01a4dffc

drivers/clk/qcom/debugcc-sdm855.c

+12 −0
Original line number Diff line number Diff line
@@ -121,6 +121,10 @@ static const char *const debug_mux_parent_names[] = { 
	"disp_cc_mdss_rscc_vsync_clk",

	"disp_cc_mdss_vsync_clk",

	"disp_cc_xo_clk",

	"measure_only_snoc_clk",

	"measure_only_cnoc_clk",

	"measure_only_bimc_clk",

	"measure_only_ipa_2x_clk",

	"gcc_aggre_noc_pcie_tbu_clk",

	"gcc_aggre_ufs_card_axi_clk",

	"gcc_aggre_ufs_phy_axi_clk",
@@ -472,6 +476,14 @@ static struct clk_debug_mux gcc_debug_mux = { 
			0x14, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C },

		{ "disp_cc_xo_clk", 0x56, 1, DISP_CC,

			0x36, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C },

		{ "measure_only_snoc_clk", 0x7, 1, GCC,

			0x7, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },

		{ "measure_only_cnoc_clk", 0x19, 1, GCC,

			0x19, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },

		{ "measure_only_bimc_clk", 0xD0, 1, GCC,

			0xD0, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },

		{ "measure_only_ipa_2x_clk", 0x147, 1, GCC,

			0x147, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },

		{ "gcc_aggre_noc_pcie_tbu_clk", 0x36, 1, GCC,

			0x36, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },

		{ "gcc_aggre_ufs_card_axi_clk", 0x141, 1, GCC,

drivers/clk/qcom/gcc-sdm855.c

+36 −0
Original line number Diff line number Diff line
@@ -220,6 +220,38 @@ static const char * const gcc_parent_names_9[] = { 
	"core_bi_pll_test_se",

};



static struct clk_dummy measure_only_snoc_clk = {

	.rrate = 1000,

	.hw.init = &(struct clk_init_data){

		.name = "measure_only_snoc_clk",

		.ops = &clk_dummy_ops,

	},

};



static struct clk_dummy measure_only_cnoc_clk = {

	.rrate = 1000,

	.hw.init = &(struct clk_init_data){

		.name = "measure_only_cnoc_clk",

		.ops = &clk_dummy_ops,

	},

};



static struct clk_dummy measure_only_bimc_clk = {

	.rrate = 1000,

	.hw.init = &(struct clk_init_data){

		.name = "measure_only_bimc_clk",

		.ops = &clk_dummy_ops,

	},

};



static struct clk_dummy measure_only_ipa_2x_clk = {

	.rrate = 1000,

	.hw.init = &(struct clk_init_data){

		.name = "measure_only_ipa_2x_clk",

		.ops = &clk_dummy_ops,

	},

};



static struct clk_dummy bi_tcxo = {

	.rrate = 19200000,

	.hw.init = &(struct clk_init_data){
@@ -4120,6 +4152,10 @@ static struct clk_branch gcc_video_xo_clk = { 


struct clk_hw *gcc_sdm855_hws[] = {

	[GCC_XO] = &bi_tcxo.hw,

	[MEASURE_ONLY_SNOC_CLK] = &measure_only_snoc_clk.hw,

	[MEASURE_ONLY_CNOC_CLK] = &measure_only_cnoc_clk.hw,

	[MEASURE_ONLY_BIMC_CLK] = &measure_only_bimc_clk.hw,

	[MEASURE_ONLY_IPA_2X_CLK] = &measure_only_ipa_2x_clk.hw,

};



static struct clk_regmap *gcc_sdm855_clocks[] = {

include/dt-bindings/clock/qcom,gcc-sdm855.h

+9 −3
Original line number Diff line number Diff line
@@ -14,9 +14,6 @@ 
#ifndef _DT_BINDINGS_CLK_QCOM_GCC_SDM855_H

#define _DT_BINDINGS_CLK_QCOM_GCC_SDM855_H



/* Hardware/Dummy/Voter clocks */

#define GCC_XO							0



/* GCC clocks */

#define GCC_AGGRE_NOC_PCIE_TBU_CLK				0

#define GCC_AGGRE_UFS_CARD_AXI_CLK				1
@@ -259,4 +256,13 @@ 
#define GCC_USB30_SEC_BCR					23

#define GCC_USB_PHY_CFG_AHB2PHY_BCR				24



/* Dummy clocks for rate measurement */

#define MEASURE_ONLY_SNOC_CLK					0

#define MEASURE_ONLY_CNOC_CLK					1

#define MEASURE_ONLY_BIMC_CLK					2

#define MEASURE_ONLY_IPA_2X_CLK					3



/* Hardware/Dummy/Voter clocks */

#define GCC_XO							4



#endif