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Commit 2cd90bc8 authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Paul Mackerras
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[POWERPC] spufs: fix class0 interrupt assignment 



The class zero interrupt handling for spus was confusing alignment and
error interrupts, so swap them.

Signed-off-by: default avatarArnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 4da30d15

arch/powerpc/platforms/cell/spu_base.c

+4 −4
Original line number Original line Diff line number Diff line
@@ -168,12 +168,12 @@ spu_irq_class_0_bottom(struct spu *spu) 




	stat &= mask;

	stat &= mask;





	if (stat & 1) /* invalid MFC DMA */

	if (stat & 1) /* invalid DMA alignment */

		__spu_trap_invalid_dma(spu);



	if (stat & 2) /* invalid DMA alignment */

		__spu_trap_dma_align(spu);

		__spu_trap_dma_align(spu);





	if (stat & 2) /* invalid MFC DMA */

		__spu_trap_invalid_dma(spu);



	if (stat & 4) /* error on SPU */

	if (stat & 4) /* error on SPU */

		__spu_trap_error(spu);

		__spu_trap_error(spu);