Loading arch/arm64/boot/dts/qcom/atoll-rumi.dtsi +31 −0 Original line number Diff line number Diff line Loading @@ -20,6 +20,30 @@ clock-frequency = <1000000>; }; usb_emu_phy: usb_emu_phy@a720000 { compatible = "qcom,usb-emu-phy"; reg = <0x0a720000 0x9500>, <0x0a6f8800 0x100>; reg-names = "base", "qcratch_base"; qcom,emu-init-seq = <0xfff0 0x4 0xfff3 0x4 0x40 0x4 0xfff3 0x4 0xfff0 0x4 0x100000 0x20 0x0 0x20 0x1a0 0x20 0x100000 0x3c 0x0 0x3c 0x10060 0x3c 0x0 0x4>; }; usb_nop_phy: usb_nop_phy { compatible = "usb-nop-xceiv"; }; wdog: qcom,wdt@17c10000{ status = "disabled"; }; Loading @@ -28,3 +52,10 @@ status = "disabled"; }; }; &usb0 { dwc3@a600000 { usb-phy = <&usb_emu_phy>, <&usb_nop_phy>; maximum-speed = "high-speed"; }; }; arch/arm64/boot/dts/qcom/atoll-usb.dtsi 0 → 100644 +130 −0 Original line number Diff line number Diff line /* Copyright (c) 2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include <dt-bindings/clock/qcom,gcc-atoll.h> #include <dt-bindings/msm/msm-bus-ids.h> &soc { usb0: ssusb@a600000 { compatible = "qcom,dwc-usb3-msm"; reg = <0x0a600000 0x100000>; reg-names = "core_base"; iommus = <&apps_smmu 0x540 0x0>; #address-cells = <1>; #size-cells = <1>; ranges; interrupts = <0 489 0>, <0 130 0>, <0 486 0>, <0 488 0>; interrupt-names = "dp_hs_phy_irq", "pwr_event_irq", "ss_phy_irq", "dm_hs_phy_irq"; USB3_GDSC-supply = <&usb30_prim_gdsc>; qcom,use-pdc-interrupts; clocks = <&clock_gcc GCC_USB30_PRIM_MASTER_CLK>, <&clock_gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&clock_gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, <&clock_gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&clock_gcc GCC_USB30_PRIM_SLEEP_CLK>, <&clock_gcc GCC_USB3_PRIM_CLKREF_CLK>; clock-names = "core_clk", "iface_clk", "bus_aggr_clk", "utmi_clk", "sleep_clk", "xo"; resets = <&clock_gcc GCC_USB30_PRIM_BCR>; reset-names = "core_reset"; qcom,core-clk-rate = <133333333>; qcom,core-clk-rate-hs = <66666667>; qcom,num-gsi-evt-buffs = <0x3>; qcom,gsi-reg-offset = <0x0fc /* GSI_GENERAL_CFG */ 0x110 /* GSI_DBL_ADDR_L */ 0x120 /* GSI_DBL_ADDR_H */ 0x130 /* GSI_RING_BASE_ADDR_L */ 0x144 /* GSI_RING_BASE_ADDR_H */ 0x1a4>; /* GSI_IF_STS */ qcom,dwc-usb3-msm-tx-fifo-size = <21288>; qcom,pm-qos-latency = <62>; qcom,msm-bus,name = "usb0"; qcom,msm-bus,num-cases = <4>; qcom,msm-bus,num-paths = <3>; qcom,msm-bus,vectors-KBps = /* suspend vote */ <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_EBI_CH0 0 0>, <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 0>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 0>, /* nominal vote */ <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_EBI_CH0 1000000 2500000>, <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 2400>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 40000>, /* svs vote */ <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_EBI_CH0 240000 700000>, <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 2400>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 40000>, /* min vote */ <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_EBI_CH0 1 1>, <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 1 1>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 1 1>; dwc3@a600000 { compatible = "snps,dwc3"; reg = <0x0a600000 0xcd00>; interrupts = <0 133 0>; linux,sysdev_is_parent; snps,disable-clk-gating; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x10>; snps,usb3_lpm_capable; usb-core-id = <0>; tx-fifo-resize; maximum-speed = "super-speed"; dr_mode = "otg"; }; qcom,usbbam@a704000 { compatible = "qcom,usb-bam-msm"; reg = <0xa704000 0x17000>; interrupts = <0 132 0>; qcom,usb-bam-fifo-baseaddr = <0x146a6000>; qcom,usb-bam-num-pipes = <4>; qcom,disable-clk-gating; qcom,usb-bam-override-threshold = <0x4001>; qcom,usb-bam-max-mbps-highspeed = <400>; qcom,usb-bam-max-mbps-superspeed = <3600>; qcom,reset-bam-on-connect; qcom,pipe0 { label = "ssusb-qdss-in-0"; qcom,usb-bam-mem-type = <2>; qcom,dir = <1>; qcom,pipe-num = <0>; qcom,peer-bam = <0>; qcom,peer-bam-physical-address = <0x6064000>; qcom,src-bam-pipe-index = <0>; qcom,dst-bam-pipe-index = <0>; qcom,data-fifo-offset = <0x0>; qcom,data-fifo-size = <0x1800>; qcom,descriptor-fifo-offset = <0x1800>; qcom,descriptor-fifo-size = <0x800>; }; }; }; }; arch/arm64/boot/dts/qcom/atoll.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -1683,3 +1683,4 @@ #include "atoll-pinctrl.dtsi" #include "atoll-pm.dtsi" #include "atoll-stub-regulator.dtsi" #include "atoll-usb.dtsi" Loading
arch/arm64/boot/dts/qcom/atoll-rumi.dtsi +31 −0 Original line number Diff line number Diff line Loading @@ -20,6 +20,30 @@ clock-frequency = <1000000>; }; usb_emu_phy: usb_emu_phy@a720000 { compatible = "qcom,usb-emu-phy"; reg = <0x0a720000 0x9500>, <0x0a6f8800 0x100>; reg-names = "base", "qcratch_base"; qcom,emu-init-seq = <0xfff0 0x4 0xfff3 0x4 0x40 0x4 0xfff3 0x4 0xfff0 0x4 0x100000 0x20 0x0 0x20 0x1a0 0x20 0x100000 0x3c 0x0 0x3c 0x10060 0x3c 0x0 0x4>; }; usb_nop_phy: usb_nop_phy { compatible = "usb-nop-xceiv"; }; wdog: qcom,wdt@17c10000{ status = "disabled"; }; Loading @@ -28,3 +52,10 @@ status = "disabled"; }; }; &usb0 { dwc3@a600000 { usb-phy = <&usb_emu_phy>, <&usb_nop_phy>; maximum-speed = "high-speed"; }; };
arch/arm64/boot/dts/qcom/atoll-usb.dtsi 0 → 100644 +130 −0 Original line number Diff line number Diff line /* Copyright (c) 2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include <dt-bindings/clock/qcom,gcc-atoll.h> #include <dt-bindings/msm/msm-bus-ids.h> &soc { usb0: ssusb@a600000 { compatible = "qcom,dwc-usb3-msm"; reg = <0x0a600000 0x100000>; reg-names = "core_base"; iommus = <&apps_smmu 0x540 0x0>; #address-cells = <1>; #size-cells = <1>; ranges; interrupts = <0 489 0>, <0 130 0>, <0 486 0>, <0 488 0>; interrupt-names = "dp_hs_phy_irq", "pwr_event_irq", "ss_phy_irq", "dm_hs_phy_irq"; USB3_GDSC-supply = <&usb30_prim_gdsc>; qcom,use-pdc-interrupts; clocks = <&clock_gcc GCC_USB30_PRIM_MASTER_CLK>, <&clock_gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&clock_gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, <&clock_gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&clock_gcc GCC_USB30_PRIM_SLEEP_CLK>, <&clock_gcc GCC_USB3_PRIM_CLKREF_CLK>; clock-names = "core_clk", "iface_clk", "bus_aggr_clk", "utmi_clk", "sleep_clk", "xo"; resets = <&clock_gcc GCC_USB30_PRIM_BCR>; reset-names = "core_reset"; qcom,core-clk-rate = <133333333>; qcom,core-clk-rate-hs = <66666667>; qcom,num-gsi-evt-buffs = <0x3>; qcom,gsi-reg-offset = <0x0fc /* GSI_GENERAL_CFG */ 0x110 /* GSI_DBL_ADDR_L */ 0x120 /* GSI_DBL_ADDR_H */ 0x130 /* GSI_RING_BASE_ADDR_L */ 0x144 /* GSI_RING_BASE_ADDR_H */ 0x1a4>; /* GSI_IF_STS */ qcom,dwc-usb3-msm-tx-fifo-size = <21288>; qcom,pm-qos-latency = <62>; qcom,msm-bus,name = "usb0"; qcom,msm-bus,num-cases = <4>; qcom,msm-bus,num-paths = <3>; qcom,msm-bus,vectors-KBps = /* suspend vote */ <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_EBI_CH0 0 0>, <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 0>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 0>, /* nominal vote */ <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_EBI_CH0 1000000 2500000>, <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 2400>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 40000>, /* svs vote */ <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_EBI_CH0 240000 700000>, <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 2400>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 40000>, /* min vote */ <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_EBI_CH0 1 1>, <MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 1 1>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 1 1>; dwc3@a600000 { compatible = "snps,dwc3"; reg = <0x0a600000 0xcd00>; interrupts = <0 133 0>; linux,sysdev_is_parent; snps,disable-clk-gating; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x10>; snps,usb3_lpm_capable; usb-core-id = <0>; tx-fifo-resize; maximum-speed = "super-speed"; dr_mode = "otg"; }; qcom,usbbam@a704000 { compatible = "qcom,usb-bam-msm"; reg = <0xa704000 0x17000>; interrupts = <0 132 0>; qcom,usb-bam-fifo-baseaddr = <0x146a6000>; qcom,usb-bam-num-pipes = <4>; qcom,disable-clk-gating; qcom,usb-bam-override-threshold = <0x4001>; qcom,usb-bam-max-mbps-highspeed = <400>; qcom,usb-bam-max-mbps-superspeed = <3600>; qcom,reset-bam-on-connect; qcom,pipe0 { label = "ssusb-qdss-in-0"; qcom,usb-bam-mem-type = <2>; qcom,dir = <1>; qcom,pipe-num = <0>; qcom,peer-bam = <0>; qcom,peer-bam-physical-address = <0x6064000>; qcom,src-bam-pipe-index = <0>; qcom,dst-bam-pipe-index = <0>; qcom,data-fifo-offset = <0x0>; qcom,data-fifo-size = <0x1800>; qcom,descriptor-fifo-offset = <0x1800>; qcom,descriptor-fifo-size = <0x800>; }; }; }; };
arch/arm64/boot/dts/qcom/atoll.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -1683,3 +1683,4 @@ #include "atoll-pinctrl.dtsi" #include "atoll-pm.dtsi" #include "atoll-stub-regulator.dtsi" #include "atoll-usb.dtsi"