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Commit 2c2b8285 authored by Linus Torvalds's avatar Linus Torvalds
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Pull ARC updates from Vineet Gupta:

 - Support for new MM features in ARCv2 cores (THP, PAE40) Some generic
   THP bits are touched - all ACKed by Kirill

 - Platform framework updates to prepare for EZChip arrival (still in works)

 - ARC Public Mailing list setup finally (linux-snps-arc@lists.infraded.org)

* tag 'arc-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (42 commits)
  ARC: mm: PAE40 support
  ARC: mm: PAE40: tlbex.S: Explicitify the size of pte_t
  ARC: mm: PAE40: switch to using phys_addr_t for physical addresses
  ARC: mm: HIGHMEM: populate high memory from DT
  ARC: mm: HIGHMEM: kmap API implementation
  ARC: mm: preps ahead of HIGHMEM support #2
  ARC: mm: preps ahead of HIGHMEM support
  ARC: mm: use generic macros _BITUL()/_AC()
  ARC: mm: Improve Duplicate PD Fault handler
  MAINTAINERS: Add public mailing list for ARC
  ARC: Ensure DT mem base is same as what kernel is built with
  ARC: boot: Non Master cpus only need to call EARLY_CPU_SETUP once
  ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_smp()
  ARC: smp: Introduce smp hook @init_irq_cpu called for all cores
  ARC: smp: Rename platform hook @init_smp -> @init_cpu_smp
  ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_early_smp()
  ARC: smp: Introduce smp hook @init_early_smp for Master core
  ARC: remove @init_time, @init_irq platform callbacks
  ARC: smp: irqchip: handle IPI as percpu irq like timer
  ARC: boot: Support Halt-on-reset and Run-on-reset SMP booting modes
  ...
parents 0921f1ef 5a364c2a
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+1 −1
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@
    |         arch |status|
    -----------------------
    |       alpha: | TODO |
    |         arc: |  ..  |
    |         arc: |  ok  |
    |         arm: |  ok  |
    |       arm64: |  ok  |
    |       avr32: |  ..  |
+1 −1
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@
    |         arch |status|
    -----------------------
    |       alpha: | TODO |
    |         arc: | TODO |
    |         arc: |  ok  |
    |         arm: |  ok  |
    |       arm64: |  ok  |
    |       avr32: | TODO |
+1 −0
Original line number Diff line number Diff line
@@ -10121,6 +10121,7 @@ F: include/net/switchdev.h

SYNOPSYS ARC ARCHITECTURE
M:	Vineet Gupta <vgupta@synopsys.com>
L:	linux-snps-arc@lists.infraded.org
S:	Supported
F:	arch/arc/
F:	Documentation/devicetree/bindings/arc/*
+40 −0
Original line number Diff line number Diff line
@@ -76,6 +76,10 @@ config STACKTRACE_SUPPORT
config HAVE_LATENCYTOP_SUPPORT
	def_bool y

config HAVE_ARCH_TRANSPARENT_HUGEPAGE
	def_bool y
	depends on ARC_MMU_V4

source "init/Kconfig"
source "kernel/Kconfig.freezer"

@@ -190,6 +194,16 @@ config NR_CPUS
	range 2 4096
	default "4"

config ARC_SMP_HALT_ON_RESET
	bool "Enable Halt-on-reset boot mode"
	default y if ARC_UBOOT_SUPPORT
	help
	  In SMP configuration cores can be configured as Halt-on-reset
	  or they could all start at same time. For Halt-on-reset, non
	  masters are parked until Master kicks them so they can start of
	  at designated entry point. For other case, all jump to common
	  entry point and spin wait for Master's signal.

endif	#SMP

menuconfig ARC_CACHE
@@ -278,6 +292,8 @@ choice
	default ARC_MMU_V2 if ARC_CPU_750D
	default ARC_MMU_V4 if ARC_CPU_HS

if ISA_ARCOMPACT

config ARC_MMU_V1
	bool "MMU v1"
	help
@@ -297,6 +313,8 @@ config ARC_MMU_V3
	  Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
	  Shared Address Spaces (SASID)

endif

config ARC_MMU_V4
	bool "MMU v4"
	depends on ISA_ARCV2
@@ -428,6 +446,28 @@ config LINUX_LINK_BASE
	  Linux needs to be scooted a bit.
	  If you don't know what the above means, leave this setting alone.

config HIGHMEM
	bool "High Memory Support"
	help
	  With ARC 2G:2G address split, only upper 2G is directly addressable by
	  kernel. Enable this to potentially allow access to rest of 2G and PAE
	  in future

config ARC_HAS_PAE40
	bool "Support for the 40-bit Physical Address Extension"
	default n
	depends on ISA_ARCV2
	select HIGHMEM
	help
	  Enable access to physical memory beyond 4G, only supported on
	  ARC cores with 40 bit Physical Addressing support

config ARCH_PHYS_ADDR_T_64BIT
	def_bool ARC_HAS_PAE40

config ARCH_DMA_ADDR_T_64BIT
	bool

config ARC_CURR_IN_REG
	bool "Dedicate Register r25 for current_task pointer"
	default y
+1 −1
Original line number Diff line number Diff line
@@ -95,6 +95,6 @@
		#size-cells = <1>;
		ranges = <0x00000000 0x80000000 0x40000000>;
		device_type = "memory";
		reg = <0x00000000 0x20000000>;	/* 512MiB */
		reg = <0x80000000 0x20000000>;	/* 512MiB */
	};
};
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