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Commit 2ada7013 authored by Tharun Raj Soma's avatar Tharun Raj Soma Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add support for throttle and div clocks on TRINKET 



Add support for throttle and div clocks on TRINKET target.

Change-Id: I54a511af2b1f4cea73efcff45d9eb83407b4a524
Signed-off-by: default avatarTharun Raj Soma <tsoma@codeaurora.org>
parent ccc4db28

arch/arm64/boot/dts/qcom/trinket-sde.dtsi

+5 −3
Original line number Diff line number Diff line
@@ -25,16 +25,18 @@ 
		clocks =

			<&clock_gcc GCC_DISP_AHB_CLK>,

			<&clock_gcc GCC_DISP_HF_AXI_CLK>,

			<&clock_gcc GCC_DISP_THROTTLE_CORE_CLK>,

			<&clock_gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,

			<&clock_dispcc DISP_CC_MDSS_AHB_CLK>,

			<&clock_dispcc DISP_CC_MDSS_MDP_CLK>,

			<&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>,

			<&clock_dispcc DISP_CC_MDSS_MDP_LUT_CLK>,

			<&clock_dispcc DISP_CC_MDSS_ROT_CLK>;

		clock-names = "gcc_iface", "gcc_bus",

		clock-names = "gcc_iface", "gcc_bus", "throttle_clk", "div_clk",

				"iface_clk", "core_clk", "vsync_clk",

				"lut_clk", "rot_clk";

		clock-rate = <0 0 0 256000000 19200000 192000000>;

		clock-max-rate = <0 0 0 307000000 19200000 307000000>;

		clock-rate = <0 0 0 0 0 256000000 19200000 192000000>;

		clock-max-rate = <0 0 0 0 0 307000000 19200000 307000000>;



		sde-vdd-supply = <&mdss_core_gdsc>;