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Commit 29afc4e9 authored Feb 10, 2015 by Linus Torvalds

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial

Pull trivial tree changes from Jiri Kosina:
 "Patches from trivial.git that keep the world turning around.

  Mostly documentation and comment fixes, and a two corner-case code
  fixes from Alan Cox"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial:
  kexec, Kconfig: spell "architecture" properly
  mm: fix cleancache debugfs directory path
  blackfin: mach-common: ints-priority: remove unused function
  doubletalk: probe failure causes OOPS
  ARM: cache-l2x0.c: Make it clear that cache-l2x0 handles L310 cache controller
  msdos_fs.h: fix 'fields' in comment
  scsi: aic7xxx: fix comment
  ARM: l2c: fix comment
  ibmraid: fix writeable attribute with no store method
  dynamic_debug: fix comment
  doc: usbmon: fix spelling s/unpriviledged/unprivileged/
  x86: init_mem_mapping(): use capital BIOS in comment

parents 1d9c5d79 edb0ec07

Documentation/usb/usbmon.txt

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -231,7 +231,7 @@ number. Number zero (/dev/usbmon0) is special and means "all buses".
	Note that specific naming policy is set by your Linux distribution.		Note that specific naming policy is set by your Linux distribution.

	If you create /dev/usbmon0 by hand, make sure that it is owned by root		If you create /dev/usbmon0 by hand, make sure that it is owned by root
	and has mode 0600. Otherwise, unpriviledged users will be able to snoop		and has mode 0600. Otherwise, unprivileged users will be able to snoop
	keyboard traffic.		keyboard traffic.

	The following ioctl calls are available, with MON_IOC_MAGIC 0x92:		The following ioctl calls are available, with MON_IOC_MAGIC 0x92:

Documentation/vm/cleancache.txt

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -85,7 +85,7 @@ lock the page to ensure serial behavior.
	CLEANCACHE PERFORMANCE METRICS		CLEANCACHE PERFORMANCE METRICS

	If properly configured, monitoring of cleancache is done via debugfs in		If properly configured, monitoring of cleancache is done via debugfs in
	the /sys/kernel/debug/mm/cleancache directory. The effectiveness of cleancache		the /sys/kernel/debug/cleancache directory. The effectiveness of cleancache
	can be measured (across all filesystems) with:		can be measured (across all filesystems) with:

	succ_gets - number of gets that were successful		succ_gets - number of gets that were successful

arch/arm/mm/cache-l2x0.c

+2 −2

Original line number	Original line	Diff line number	Diff line
	/*		/*
	* arch/arm/mm/cache-l2x0.c - L210/L220 cache controller support		* arch/arm/mm/cache-l2x0.c - L210/L220/L310 cache controller support
	*		*
	* Copyright (C) 2007 ARM Limited		* Copyright (C) 2007 ARM Limited
	*		*
	@@ -979,7 +979,7 @@ static int __init l2x0_cache_size_of_parse(const struct device_node *np,
	/* All these l2 caches have the same line = block size actually */		/* All these l2 caches have the same line = block size actually */
	if (!line_size) {		if (!line_size) {
	if (block_size) {		if (block_size) {
	/* If linesize if not given, it is equal to blocksize */		/* If linesize is not given, it is equal to blocksize */
	line_size = block_size;		line_size = block_size;
	} else {		} else {
	/* Fall back to known size */		/* Fall back to known size */

arch/blackfin/mach-common/ints-priority.c

+0 −8

Original line number	Original line	Diff line number	Diff line
	@@ -429,14 +429,6 @@ static void init_software_driven_irq(void)
	bfin_sec_enable_ssi(37);		bfin_sec_enable_ssi(37);
	}		}

	void bfin_sec_resume(void)
	{
	bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_RESET);
	udelay(100);
	bfin_write_SEC_GCTL(SEC_GCTL_EN);
	bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_EN \| SEC_CCTL_NMI_EN);
	}

	void handle_sec_sfi_fault(uint32_t gstat)		void handle_sec_sfi_fault(uint32_t gstat)
	{		{

arch/x86/mm/init.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -608,7 +608,7 @@ void __init init_mem_mapping(void)
	*		*
	*		*
	* On x86, access has to be given to the first megabyte of ram because that area		* On x86, access has to be given to the first megabyte of ram because that area
	* contains bios code and data regions used by X and dosemu and similar apps.		* contains BIOS code and data regions used by X and dosemu and similar apps.
	* Access has to be given to non-kernel-ram areas as well, these contain the PCI		* Access has to be given to non-kernel-ram areas as well, these contain the PCI
	* mmio resources as well as potential bios/acpi data regions.		* mmio resources as well as potential bios/acpi data regions.
	*/		*/