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Commit 27aad2f5 authored by Srikanth Uyyala's avatar Srikanth Uyyala Committed by Vijay kumar Tumati
Browse files

ARM: dts: msm: Bring up camera subsystem 



Add clock and voltage changes to enable camera subsystem
on trinket platform.

Change-Id: Ieab706e9ecffed6fe7b63a5263e71edeb0bc6892
Signed-off-by: default avatarSrikanth Uyyala <suyyala@codeaurora.org>
parent ccc4db28

arch/arm64/boot/dts/qcom/trinket-camera-sensor-idp.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -154,7 +154,7 @@ 
		compatible = "qcom,camera";

		reg = <0x1>;

		qcom,csiphy-sd-index = <1>;

		qcom,csid-sd-index = <2>;

		qcom,csid-sd-index = <1>;

		qcom,mount-angle = <90>;

		cam_vio-supply = <&L12A>;

		cam_vana-supply = <&L4P>;
@@ -172,7 +172,7 @@ 
		pinctrl-1 = <&cam_sensor_mclk1_suspend

				 &cam_sensor_rear2_suspend>;

		gpios = <&tlmm 35 0>,

			<&tlmm 45 0>;

			<&tlmm 46 0>;

		qcom,gpio-reset = <1>;

		qcom,gpio-req-tbl-num = <0 1>;

		qcom,gpio-req-tbl-flags = <1 0>;
@@ -192,8 +192,8 @@ 
		cell-index = <2>;

		compatible = "qcom,camera";

		reg = <0x02>;

		qcom,csiphy-sd-index = <1>;

		qcom,csid-sd-index = <1>;

		qcom,csiphy-sd-index = <2>;

		qcom,csid-sd-index = <2>;

		qcom,mount-angle = <90>;

		qcom,eeprom-src = <&eeprom1>;

		cam_vio-supply = <&L12A>;

arch/arm64/boot/dts/qcom/trinket-camera.dtsi

+44 −40
Original line number Diff line number Diff line
@@ -122,13 +122,13 @@ 
		reg-names = "csid";

		interrupts = <0 208 0>;

		interrupt-names = "csid";

		qcom,csi-vdd-voltage = <1200000>;

		qcom,csi-vdd-voltage = <1232000>;

		qcom,mipi-csi-vdd-supply = <&L18A>;

		gdscr-supply = <&camss_top_gdsc>;

		vdd_sec-supply = <&L18A>;

		qcom,cam-vreg-name = "vdd_sec", "gdscr";

		qcom,cam-vreg-min-voltage = <925000 0>;

		qcom,cam-vreg-max-voltage = <925000 0>;

		qcom,cam-vreg-min-voltage = <1232000 0>;

		qcom,cam-vreg-max-voltage = <1232000 0>;

		qcom,cam-vreg-op-mode = <0 0>;

		clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_TOP_AHB_CLK>,
@@ -156,13 +156,13 @@ 
		reg-names = "csid";

		interrupts = <0 209 0>;

		interrupt-names = "csid";

		qcom,csi-vdd-voltage = <1200000>;

		qcom,csi-vdd-voltage = <1232000>;

		qcom,mipi-csi-vdd-supply = <&L18A>;

		gdscr-supply = <&camss_top_gdsc>;

		vdd_sec-supply = <&L18A>;

		qcom,cam-vreg-name = "vdd_sec", "gdscr";

		qcom,cam-vreg-min-voltage = <925000 0>;

		qcom,cam-vreg-max-voltage = <925000 0>;

		qcom,cam-vreg-min-voltage = <1232000 0>;

		qcom,cam-vreg-max-voltage = <1232000 0>;

		qcom,cam-vreg-op-mode = <0 0>;

		clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_TOP_AHB_CLK>,
@@ -190,13 +190,13 @@ 
		reg-names = "csid";

		interrupts = <0 210 0>;

		interrupt-names = "csid";

		qcom,csi-vdd-voltage = <1200000>;

		qcom,csi-vdd-voltage = <1232000>;

		qcom,mipi-csi-vdd-supply = <&L18A>;

		gdscr-supply = <&camss_top_gdsc>;

		vdd_sec-supply = <&L18A>;

		qcom,cam-vreg-name = "vdd_sec", "gdscr";

		qcom,cam-vreg-min-voltage = <925000 0>;

		qcom,cam-vreg-max-voltage = <925000 0>;

		qcom,cam-vreg-min-voltage = <1232000 0>;

		qcom,cam-vreg-max-voltage = <1232000 0>;

		qcom,cam-vreg-op-mode = <0 0>;

		clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_TOP_AHB_CLK>,
@@ -224,13 +224,13 @@ 
		reg-names = "csid";

		interrupts = <0 211 0>;

		interrupt-names = "csid";

		qcom,csi-vdd-voltage = <1200000>;

		qcom,csi-vdd-voltage = <1232000>;

		qcom,mipi-csi-vdd-supply = <&L18A>;

		gdscr-supply = <&camss_top_gdsc>;

		vdd_sec-supply = <&L18A>;

		qcom,cam-vreg-name = "vdd_sec", "gdscr";

		qcom,cam-vreg-min-voltage = <925000 0>;

		qcom,cam-vreg-max-voltage = <925000 0>;

		qcom,cam-vreg-min-voltage = <1232000 0>;

		qcom,cam-vreg-max-voltage = <1232000 0>;

		qcom,cam-vreg-op-mode = <0 0>;

		clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_TOP_AHB_CLK>,
@@ -258,8 +258,7 @@ 
		msm_cam_smmu_cb1 {

			compatible = "qcom,msm-cam-smmu-cb";

			iommus = <&apps_smmu 0x420 0x0000>,

					<&apps_smmu 0x421 0x0002>,

					<&apps_smmu 0x423 0x0002>;

					<&apps_smmu 0x421 0x0002>;

			label = "vfe";

			qcom,scratch-buf-support;

		};
@@ -275,12 +274,12 @@ 
			iommus = <&apps_smmu 0x820 0x0001>;

			label = "jpeg_enc0";

		};



		msm_cam_smmu_cb5 {

			compatible = "qcom,msm-cam-smmu-cb";

			iommus = <&apps_smmu 0x821 0x0001>;

			label = "jpeg_dma";

		};



	};



	qcom,cpp@5c04000 {
@@ -303,13 +302,14 @@ 
			<&clock_gcc GCC_CAMSS_CPP_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_CPP_AXI_CLK>,

			<&clock_gcc GCC_CAMSS_MICRO_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_CPP_VBIF_AHB_CLK>;

			<&clock_gcc GCC_CAMSS_CPP_VBIF_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_THROTTLE_NRT_AXI_CLK>;

		clock-names = "camss_ahb_clk", "camss_top_ahb_clk",

			"cpp_src_clk",

			"cpp_core_clk", "camss_cpp_ahb_clk",

			"camss_cpp_axi_clk", "micro_iface_clk",

			"cpp_vbif_ahb_clk";

		qcom,clock-rates = <0 0 256000000 256000000 0 0 0 0>;

			"cpp_vbif_ahb_clk", "mmss_throttle_camss_nrt_axi_clk";

		qcom,clock-rates = <0 0 256000000 256000000 0 0 0 0 0>;

		qcom,min-clock-rate = <256000000>;

		qcom,bus-master = <1>;

		status = "ok";
@@ -436,11 +436,10 @@ 
		interrupts = <0 214 0>,

				<0 258 0>;

		interrupt-names = "vfe", "dual-vfe-irq";

		vdd-supply = <&camss_vfe0_gdsc>;

		camss-vdd-supply = <&camss_top_gdsc>;

		qcom,vdd-names = "vdd", "camss-vdd";

		clocks = <&clock_gcc GCC_CAMSS_THROTTLE_RT_AXI_CLK>,

			<&clock_gcc GCC_CAMERA_AHB_CLK>,

		vdd-supply = <&camss_vfe0_gdsc>;

		qcom,vdd-names = "camss-vdd", "vdd";

		clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_TOP_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_VFE0_CLK_SRC>,

			<&clock_gcc GCC_CAMSS_VFE0_CLK>,
@@ -448,16 +447,17 @@ 
			<&clock_gcc GCC_CAMSS_VFE0_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_VFE_VBIF_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_VFE_VBIF_AXI_CLK>,

			<&clock_gcc GCC_CAMSS_THROTTLE_RT_AXI_CLK>,

			<&clock_gcc GCC_CAMSS_CSI_VFE0_CLK>;

		clock-names = "mmss_throttle_camss_axi_clk", "camss_ahb_clk",

		clock-names = "camss_ahb_clk",

			"camss_top_ahb_clk", "vfe_clk_src",

			"camss_vfe_clk", "camss_vfe_stream_clk",

			"camss_vfe_ahb_clk", "camss_vfe_vbif_ahb_clk",

			"camss_vfe_vbif_axi_clk",

			"camss_vfe_vbif_axi_clk", "mmss_throttle_camss_axi_clk",

			"camss_csi_vfe_clk";

		qcom,clock-rates = <0 0 0 403200000 0 0 0 0 0 0

					0 0 0 480000000 0 0 0 0 0 0

					0 0 0 576000000 0 0 0 0 0 0>;

		qcom,clock-rates = <0 0 403200000 0 0 0 0 0 0 0

					0 0 480000000 0 0 0 0 0 0 0

					0 0 576000000 0 0 0 0 0 0 0>;

		status = "ok";

		qos-entries = <8>;

		qos-regs = <0x404 0x408 0x40c 0x410 0x414 0x418
@@ -510,15 +510,14 @@ 
		reg = <0x5c14000 0x4000>,

			<0x5c40000 0x3000>,

			<0x5C00000 0x40000>;

		reg-names = "vfe", "vfe_vbif", "dual-vfe-irq";

		reg-names = "vfe", "vfe_vbif", "msm-cam";

		interrupts = <0 215 0>,

				<0 258 0>;

		interrupt-names = "vfe", "dual-vfe-irq";

		vdd-supply = <&camss_vfe1_gdsc>;

		camss-vdd-supply = <&camss_top_gdsc>;

		qcom,vdd-names = "vdd", "camss-vdd";

		clocks = <&clock_gcc GCC_CAMSS_THROTTLE_RT_AXI_CLK>,

			<&clock_gcc GCC_CAMERA_AHB_CLK>,

		vdd-supply = <&camss_vfe1_gdsc>;

		qcom,vdd-names = "camss-vdd", "vdd";

		clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_TOP_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_VFE1_CLK_SRC>,

			<&clock_gcc GCC_CAMSS_VFE1_CLK>,
@@ -526,16 +525,17 @@ 
			<&clock_gcc GCC_CAMSS_VFE1_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_VFE_VBIF_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_VFE_VBIF_AXI_CLK>,

			<&clock_gcc GCC_CAMSS_THROTTLE_RT_AXI_CLK>,

			<&clock_gcc GCC_CAMSS_CSI_VFE1_CLK>;

		clock-names = "mmss_throttle_camss_axi_clk", "camss_ahb_clk",

		clock-names = "camss_ahb_clk",

			"camss_top_ahb_clk", "vfe_clk_src",

			"camss_vfe_clk", "camss_vfe_stream_clk",

			"camss_vfe_ahb_clk", "camss_vfe_vbif_ahb_clk",

			"camss_vfe_vbif_axi_clk",

			"camss_vfe_vbif_axi_clk", "mmss_throttle_camss_axi_clk",

			"camss_csi_vfe_clk";

		qcom,clock-rates = <0 0 0 403200000 0 0 0 0 0 0

					0 0 0 480000000 0 0 0 0 0 0

					0 0 0 576000000 0 0 0 0 0 0>;

		qcom,clock-rates = <0 0 403200000 0 0 0 0 0 0 0

					0 0 480000000 0 0 0 0 0 0 0

					0 0 576000000 0 0 0 0 0 0 0>;

		status = "ok";

		qos-entries = <8>;

		qos-regs = <0x404 0x408 0x40c 0x410 0x414 0x418
@@ -647,15 +647,17 @@ 
		qcom,vdd-names = "camss-vdd";

		clock-names = "mmss_camss_ahb_clk",

			"mmss_camss_top_ahb_clk",

			"core_clk",

			"core_src_clk",

			"core_src",

			"mmss_camss_jpeg_ahb_clk",

			"mmss_camss_jpeg_axi_clk";

		clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_TOP_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_JPEG_CLK_SRC>,

			<&clock_gcc GCC_CAMSS_JPEG_CLK>,

			<&clock_gcc GCC_CAMSS_JPEG_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_JPEG_AXI_CLK>;

		qcom,clock-rates = <0 0 480000000 0 0>;

		qcom,clock-rates = <0 0 480000000 0 0 0>;

		qcom,vbif-reg-settings = <0x4 0x1>;

		qcom,vbif-qos-setting = <0x550 0x1111>;

		qcom,prefetch-reg-settings = <0x30c 0x1111>,
@@ -683,15 +685,17 @@ 
		qcom,vdd-names = "camss-vdd";

		clock-names = "mmss_camss_ahb_clk",

			"mmss_camss_top_ahb_clk",

			"core_clk_src",

			"core_clk",

			"mmss_camss_jpeg_ahb_clk",

			"mmss_camss_jpeg_axi_clk";

		clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_TOP_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_JPEG_CLK_SRC>,

			<&clock_gcc GCC_CAMSS_JPEG_CLK>,

			<&clock_gcc GCC_CAMSS_JPEG_AHB_CLK>,

			<&clock_gcc GCC_CAMSS_JPEG_AXI_CLK>;

		qcom,clock-rates = <0 0 480000000 0 0>;

		qcom,clock-rates = <0 0 480000000 0 0 0>;

		qcom,vbif-reg-settings = <0x4 0x1>;

		qcom,vbif-qos-setting = <0x550 0x1111>;

		qcom,prefetch-reg-settings = <0x18c 0x11>,