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Commit 26d3a77d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'edac_for_4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp 

Pull EDAC updates from Borislav Petkov:
 "Nothing earth-shattering - just the normal development flow of
  cleanups, improvements, fixes and such.

  Summary:

   - i31200_edac: Add Kabylake support (Jason Baron)

   - sb_edac: resolve memory controller detection issues on asymmetric
     setups with not all DIMM slots being populated (Tony Luck and Qiuxu
     Zhuo)

   - misc cleanups and fixlets all over"

* tag 'edac_for_4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (22 commits)
  EDAC, pnd2: Fix Apollo Lake DIMM detection
  EDAC, i5000, i5400: Fix definition of NRECMEMB register
  EDAC, pnd2: Make function sbi_send() static
  EDAC, pnd2: Return proper error value from apl_rd_reg()
  EDAC, altera: Simplify calculation of total memory
  EDAC, sb_edac: Avoid creating SOCK memory controller
  EDAC, mce_amd: Fix typo in SMCA error description
  EDAC, mv64x60: Sanity check edac_op_state before registering
  EDAC, thunderx: Fix a warning during l2c debugfs node creation
  EDAC, mv64x60: Check driver registration success
  EDAC, ie31200: Add Intel Kaby Lake CPU support
  EDAC, mv64x60: Replace in_le32()/out_le32() with readl()/writel()
  EDAC, mv64x60: Fix pdata->name
  EDAC, sb_edac: Bump driver version and do some cleanups
  EDAC, sb_edac: Check if ECC enabled when at least one DIMM is present
  EDAC, sb_edac: Drop NUM_CHANNELS from 8 back to 4
  EDAC, sb_edac: Carve out dimm-populating loop
  EDAC, sb_edac: Fix mod_name
  EDAC, sb_edac: Assign EDAC memory controller per h/w controller
  EDAC, sb_edac: Don't use "Socket#" in the memory controller name
  ...
parents c6b1e36c 164c2924

drivers/edac/altera_edac.c

+9 −17
Original line number Diff line number Diff line
@@ -214,24 +214,16 @@ static void altr_sdr_mc_create_debugfs_nodes(struct mem_ctl_info *mci) 
static unsigned long get_total_mem(void)

{

	struct device_node *np = NULL;

	const unsigned int *reg, *reg_end;

	int len, sw, aw;

	unsigned long start, size, total_mem = 0;

	struct resource res;

	int ret;

	unsigned long total_mem = 0;



	for_each_node_by_type(np, "memory") {

		aw = of_n_addr_cells(np);

		sw = of_n_size_cells(np);

		reg = (const unsigned int *)of_get_property(np, "reg", &len);

		reg_end = reg + (len / sizeof(u32));



		total_mem = 0;

		do {

			start = of_read_number(reg, aw);

			reg += aw;

			size = of_read_number(reg, sw);

			reg += sw;

			total_mem += size;

		} while (reg < reg_end);

		ret = of_address_to_resource(np, 0, &res);

		if (ret)

			continue;



		total_mem += resource_size(&res);

	}

	edac_dbg(0, "total_mem 0x%lx\n", total_mem);

	return total_mem;
@@ -1839,7 +1831,7 @@ static int a10_eccmgr_irqdomain_map(struct irq_domain *d, unsigned int irq, 
	return 0;

}



static struct irq_domain_ops a10_eccmgr_ic_ops = {

static const struct irq_domain_ops a10_eccmgr_ic_ops = {

	.map = a10_eccmgr_irqdomain_map,

	.xlate = irq_domain_xlate_twocell,

};

drivers/edac/i5000_edac.c

+3 −3
Original line number Diff line number Diff line
@@ -227,7 +227,7 @@ 
#define			NREC_RDWR(x)		(((x)>>11) & 1)

#define			NREC_RANK(x)		(((x)>>8) & 0x7)

#define		NRECMEMB		0xC0

#define			NREC_CAS(x)		(((x)>>16) & 0xFFFFFF)

#define			NREC_CAS(x)		(((x)>>16) & 0xFFF)

#define			NREC_RAS(x)		((x) & 0x7FFF)

#define		NRECFGLOG		0xC4

#define		NREEECFBDA		0xC8
@@ -371,7 +371,7 @@ struct i5000_error_info { 
	/* These registers are input ONLY if there was a

	 * Non-Recoverable Error */

	u16 nrecmema;		/* Non-Recoverable Mem log A */

	u16 nrecmemb;		/* Non-Recoverable Mem log B */

	u32 nrecmemb;		/* Non-Recoverable Mem log B */



};
@@ -407,7 +407,7 @@ static void i5000_get_error_info(struct mem_ctl_info *mci, 
				NERR_FAT_FBD, &info->nerr_fat_fbd);

		pci_read_config_word(pvt->branchmap_werrors,

				NRECMEMA, &info->nrecmema);

		pci_read_config_word(pvt->branchmap_werrors,

		pci_read_config_dword(pvt->branchmap_werrors,

				NRECMEMB, &info->nrecmemb);



		/* Clear the error bits, by writing them back */

drivers/edac/i5400_edac.c

+2 −2
Original line number Diff line number Diff line
@@ -368,7 +368,7 @@ struct i5400_error_info { 


	/* These registers are input ONLY if there was a Non-Rec Error */

	u16 nrecmema;		/* Non-Recoverable Mem log A */

	u16 nrecmemb;		/* Non-Recoverable Mem log B */

	u32 nrecmemb;		/* Non-Recoverable Mem log B */



};
@@ -458,7 +458,7 @@ static void i5400_get_error_info(struct mem_ctl_info *mci, 
				NERR_FAT_FBD, &info->nerr_fat_fbd);

		pci_read_config_word(pvt->branchmap_werrors,

				NRECMEMA, &info->nrecmema);

		pci_read_config_word(pvt->branchmap_werrors,

		pci_read_config_dword(pvt->branchmap_werrors,

				NRECMEMB, &info->nrecmemb);



		/* Clear the error bits, by writing them back */

drivers/edac/ie31200_edac.c

+12 −1
Original line number Diff line number Diff line
@@ -18,10 +18,12 @@ 
 * 0c04: Xeon E3-1200 v3/4th Gen Core Processor DRAM Controller

 * 0c08: Xeon E3-1200 v3 Processor DRAM Controller

 * 1918: Xeon E3-1200 v5 Skylake Host Bridge/DRAM Registers

 * 5918: Xeon E3-1200 Xeon E3-1200 v6/7th Gen Core Processor Host Bridge/DRAM Registers

 *

 * Based on Intel specification:

 * http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-e3-1200v3-vol-2-datasheet.pdf

 * http://www.intel.com/content/www/us/en/processors/xeon/xeon-e3-1200-family-vol-2-datasheet.html

 * http://www.intel.com/content/www/us/en/processors/core/7th-gen-core-family-mobile-h-processor-lines-datasheet-vol-2.html

 *

 * According to the above datasheet (p.16):

 * "
@@ -57,6 +59,7 @@ 
#define PCI_DEVICE_ID_INTEL_IE31200_HB_6 0x0c04

#define PCI_DEVICE_ID_INTEL_IE31200_HB_7 0x0c08

#define PCI_DEVICE_ID_INTEL_IE31200_HB_8 0x1918

#define PCI_DEVICE_ID_INTEL_IE31200_HB_9 0x5918



#define IE31200_DIMMS			4

#define IE31200_RANKS			8
@@ -376,7 +379,12 @@ static int ie31200_probe1(struct pci_dev *pdev, int dev_idx) 
	void __iomem *window;

	struct ie31200_priv *priv;

	u32 addr_decode, mad_offset;

	bool skl = (pdev->device == PCI_DEVICE_ID_INTEL_IE31200_HB_8);



	/*

	 * Kaby Lake seems to work like Skylake. Please re-visit this logic

	 * when adding new CPU support.

	 */

	bool skl = (pdev->device >= PCI_DEVICE_ID_INTEL_IE31200_HB_8);



	edac_dbg(0, "MC:\n");
@@ -559,6 +567,9 @@ static const struct pci_device_id ie31200_pci_tbl[] = { 
	{

		PCI_VEND_DEV(INTEL, IE31200_HB_8), PCI_ANY_ID, PCI_ANY_ID, 0, 0,

		IE31200},

	{

		PCI_VEND_DEV(INTEL, IE31200_HB_9), PCI_ANY_ID, PCI_ANY_ID, 0, 0,

		IE31200},

	{

		0,

	}            /* 0 terminated list. */

drivers/edac/mce_amd.c

+1 −1
Original line number Diff line number Diff line
@@ -161,7 +161,7 @@ static const char * const smca_ls_mce_desc[] = { 
	"Sys Read data error thread 0",

	"Sys read data error thread 1",

	"DC tag error type 2",

	"DC data error type 1 (poison comsumption)",

	"DC data error type 1 (poison consumption)",

	"DC data error type 2",

	"DC data error type 3",

	"DC tag error type 4",