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Commit 26462ad9 authored by Mintz, Yuval's avatar Mintz, Yuval Committed by David S. Miller
Browse files

qed: RoCE EDPM to honor PFC 



Configure device according to DCBx results so that EDPMs
made by RoCE would honor flow-control.

Signed-off-by: default avatarYuval Mintz <Yuval.Mintz@cavium.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 1a4a6975

drivers/net/ethernet/qlogic/qed/qed_dcbx.c

+16 −0
Original line number Diff line number Diff line
@@ -896,6 +896,22 @@ qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn, 
	}



	qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type);



	if (type == QED_DCBX_OPERATIONAL_MIB) {

		struct qed_dcbx_results *p_data;

		u16 val;



		/* Configure in NIG which protocols support EDPM and should

		 * honor PFC.

		 */

		p_data = &p_hwfn->p_dcbx_info->results;

		val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) |

		      (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc);

		val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT;

		val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN;

		qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val);

	}



	qed_dcbx_aen(p_hwfn, type);



	return rc;

drivers/net/ethernet/qlogic/qed/qed_reg_addr.h

+6 −0
Original line number Diff line number Diff line
@@ -1564,6 +1564,12 @@ 
#define NIG_REG_TSGEN_FREECNT_UPDATE_K2 0x509008UL

#define CNIG_REG_NIG_PORT0_CONF_K2 0x218200UL



#define NIG_REG_TX_EDPM_CTRL 0x501f0cUL

#define NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN (0x1 << 0)

#define NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN_SHIFT 0

#define NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN (0xff << 1)

#define NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT 1



#define PRS_REG_SEARCH_GFT 0x1f11bcUL

#define PRS_REG_CM_HDR_GFT 0x1f11c8UL

#define PRS_REG_GFT_CAM 0x1f1100UL