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Commit 24f92242 authored by Harsh Shah's avatar Harsh Shah Committed by vchinta@codeaurora.org
Browse files

msm: camera: ife: Add support for 2PD pipeline



This change adds new enum, hw info, struct changes and file
changes across the IFE driver to support the new 2PD pipeline
added to IFE in version 175 HW.

Change-Id: Ib41ecb90cd39fe7a8e2e7d39e87ad68a8483c57c
Signed-off-by: default avatarVenkat Chinta <vchinta@codeaurora.org>
Signed-off-by: default avatarHarsh Shah <harshs@codeaurora.org>
Signed-off-by: default avatarViswanadha Raju Thotakura <viswanad@codeaurora.org>
parent 82d818a4
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+2 −0
Original line number Diff line number Diff line
@@ -240,6 +240,8 @@ static const char *__cam_isp_resource_handle_id_to_type(
		return "FD";
	case CAM_ISP_IFE_OUT_RES_PDAF:
		return "PDAF";
	case CAM_ISP_IFE_OUT_RES_2PD:
		return "2PD";
	case CAM_ISP_IFE_OUT_RES_RDI_0:
		return "RDI_0";
	case CAM_ISP_IFE_OUT_RES_RDI_1:
+145 −35
Original line number Diff line number Diff line
@@ -734,6 +734,7 @@ static int cam_ife_hw_mgr_acquire_res_ife_out(

		switch (ife_src_res->res_id) {
		case CAM_ISP_HW_VFE_IN_CAMIF:
		case CAM_ISP_HW_VFE_IN_CAMIF_LITE:
			rc = cam_ife_hw_mgr_acquire_res_ife_out_pixel(ife_ctx,
				ife_src_res, in_port);
			break;
@@ -789,11 +790,11 @@ static int cam_ife_hw_mgr_acquire_res_ife_src(
		vfe_acquire.rsrc_type = CAM_ISP_RESOURCE_VFE_IN;
		vfe_acquire.tasklet = ife_ctx->common.tasklet_info;
		vfe_acquire.vfe_in.cdm_ops = ife_ctx->cdm_ops;
		vfe_acquire.vfe_in.in_port = in_port;

		switch (csid_res->res_id) {
		case CAM_IFE_PIX_PATH_RES_IPP:
			vfe_acquire.vfe_in.res_id = CAM_ISP_HW_VFE_IN_CAMIF;
			vfe_acquire.vfe_in.in_port = in_port;
			if (csid_res->is_dual_vfe)
				vfe_acquire.vfe_in.sync_mode =
				CAM_ISP_HW_SYNC_MASTER;
@@ -801,6 +802,12 @@ static int cam_ife_hw_mgr_acquire_res_ife_src(
				vfe_acquire.vfe_in.sync_mode =
				CAM_ISP_HW_SYNC_NONE;

			break;
		case CAM_IFE_PIX_PATH_RES_PPP:
			vfe_acquire.vfe_in.res_id =
				CAM_ISP_HW_VFE_IN_CAMIF_LITE;
			vfe_acquire.vfe_in.sync_mode = CAM_ISP_HW_SYNC_NONE;

			break;
		case CAM_IFE_PIX_PATH_RES_RDI_0:
			vfe_acquire.vfe_in.res_id = CAM_ISP_HW_VFE_IN_RDI0;
@@ -933,7 +940,8 @@ static int cam_ife_mgr_acquire_cid_res(
				hw_intf->hw_idx);

			if (in_port->usage_type && acquired_cnt == 1 &&
				csid_path == CAM_IFE_PIX_PATH_RES_IPP)
				((csid_path == CAM_IFE_PIX_PATH_RES_IPP) ||
				(csid_path == CAM_IFE_PIX_PATH_RES_PPP)))
				/* Continue to acquire Right */
				continue;

@@ -983,6 +991,7 @@ static int cam_ife_mgr_acquire_cid_res(
	/*
	 * Acquire Right if not already acquired.
	 * Dual IFE for RDI is not currently supported.
	 * Only one IFE should be used for 2PD data.
	 */
	if (cid_res_temp->is_dual_vfe && csid_path
		== CAM_IFE_PIX_PATH_RES_IPP && acquired_cnt == 1) {
@@ -1026,9 +1035,10 @@ static int cam_ife_mgr_acquire_cid_res(

}

static int cam_ife_hw_mgr_acquire_res_ife_csid_ipp(
static int cam_ife_hw_mgr_acquire_res_ife_csid_pxl(
	struct cam_ife_hw_mgr_ctx          *ife_ctx,
	struct cam_isp_in_port_info        *in_port)
	struct cam_isp_in_port_info        *in_port,
	bool                                is_ipp)
{
	int rc = -1;
	int i;
@@ -1039,11 +1049,18 @@ static int cam_ife_hw_mgr_acquire_res_ife_csid_ipp(
	struct cam_ife_hw_mgr_res                *cid_res;
	struct cam_hw_intf                       *hw_intf;
	struct cam_csid_hw_reserve_resource_args  csid_acquire;
	enum cam_ife_pix_path_res_id              path_res_id;

	ife_hw_mgr = ife_ctx->hw_mgr;
	/* get cid resource */
	if (is_ipp)
		path_res_id = CAM_IFE_PIX_PATH_RES_IPP;
	else
		path_res_id = CAM_IFE_PIX_PATH_RES_PPP;

	rc = cam_ife_mgr_acquire_cid_res(ife_ctx, in_port, &cid_res,
		CAM_IFE_PIX_PATH_RES_IPP);
		path_res_id);

	if (rc) {
		CAM_ERR(CAM_ISP, "Acquire IFE CID resource Failed");
		goto end;
@@ -1057,7 +1074,8 @@ static int cam_ife_hw_mgr_acquire_res_ife_csid_ipp(

	csid_res->res_type =
		(enum cam_ife_hw_mgr_res_type)CAM_ISP_RESOURCE_PIX_PATH;
	csid_res->res_id = CAM_IFE_PIX_PATH_RES_IPP;

	csid_res->res_id = path_res_id;

	if (in_port->usage_type)
		csid_res->is_dual_vfe = 1;
@@ -1069,8 +1087,9 @@ static int cam_ife_hw_mgr_acquire_res_ife_csid_ipp(
	/* IPP resource needs to be from same HW as CID resource */
	for (i = 0; i <= csid_res->is_dual_vfe; i++) {
		CAM_DBG(CAM_ISP, "i %d is_dual %d", i, csid_res->is_dual_vfe);

		csid_acquire.res_type = CAM_ISP_RESOURCE_PIX_PATH;
		csid_acquire.res_id = CAM_IFE_PIX_PATH_RES_IPP;
		csid_acquire.res_id = path_res_id;
		csid_acquire.cid = cid_res->hw_res[i]->res_id;
		csid_acquire.in_port = in_port;
		csid_acquire.out_port = in_port->data;
@@ -1099,15 +1118,16 @@ static int cam_ife_hw_mgr_acquire_res_ife_csid_ipp(
			&csid_acquire, sizeof(csid_acquire));
		if (rc) {
			CAM_ERR(CAM_ISP,
				"Cannot acquire ife csid ipp resource");
				"Cannot acquire ife csid pxl path rsrc %s",
				(is_ipp) ? "IPP" : "PPP");
			goto put_res;
		}

		csid_res->hw_res[i] = csid_acquire.node_res;
		CAM_DBG(CAM_ISP,
			"acquired csid(%s)=%d ipp rsrc successfully",
			(i == 0) ? "left" : "right",
			hw_intf->hw_idx);
			"acquired csid(%s)=%d pxl path rsrc %s successfully",
			(i == 0) ? "left" : "right", hw_intf->hw_idx,
			(is_ipp) ? "IPP" : "PPP");
	}
	cam_ife_hw_mgr_put_res(&ife_ctx->res_list_ife_csid, &csid_res);

@@ -1269,11 +1289,13 @@ static int cam_ife_hw_mgr_acquire_res_root(
static int cam_ife_hw_mgr_preprocess_out_port(
	struct cam_ife_hw_mgr_ctx   *ife_ctx,
	struct cam_isp_in_port_info *in_port,
	int                         *pixel_count,
	int                         *rdi_count)
	int                         *ipp_count,
	int                         *rdi_count,
	int                         *ppp_count)
{
	int pixel_num      = 0;
	int ipp_num        = 0;
	int rdi_num        = 0;
	int ppp_num        = 0;
	uint32_t i;
	struct cam_isp_out_port_info      *out_port;
	struct cam_ife_hw_mgr             *ife_hw_mgr;
@@ -1284,12 +1306,15 @@ static int cam_ife_hw_mgr_preprocess_out_port(
		out_port = &in_port->data[i];
		if (cam_ife_hw_mgr_is_rdi_res(out_port->res_type))
			rdi_num++;
		else if (out_port->res_type == CAM_ISP_IFE_OUT_RES_2PD)
			ppp_num++;
		else
			pixel_num++;
			ipp_num++;
	}

	*pixel_count = pixel_num;
	*ipp_count = ipp_num;
	*rdi_count = rdi_num;
	*ppp_count = ppp_num;

	return 0;
}
@@ -1301,8 +1326,9 @@ static int cam_ife_mgr_acquire_hw_for_ctx(
{
	int rc                                    = -1;
	int is_dual_vfe                           = 0;
	int pixel_count                           = 0;
	int ipp_count                             = 0;
	int rdi_count                             = 0;
	int ppp_count                             = 0;

	is_dual_vfe = in_port->usage_type;

@@ -1314,16 +1340,17 @@ static int cam_ife_mgr_acquire_hw_for_ctx(
	}

	cam_ife_hw_mgr_preprocess_out_port(ife_ctx, in_port,
		&pixel_count, &rdi_count);
		&ipp_count, &rdi_count, &ppp_count);

	if (!pixel_count && !rdi_count) {
		CAM_ERR(CAM_ISP, "No PIX or RDI resource");
	if (!ipp_count && !rdi_count && !ppp_count) {
		CAM_ERR(CAM_ISP, "No PIX or RDI or PPP resource");
		return -EINVAL;
	}

	if (pixel_count) {
		/* get ife csid IPP resrouce */
		rc = cam_ife_hw_mgr_acquire_res_ife_csid_ipp(ife_ctx, in_port);
	if (ipp_count) {
		/* get ife csid IPP resource */
		rc = cam_ife_hw_mgr_acquire_res_ife_csid_pxl(ife_ctx,
			in_port, true);
		if (rc) {
			CAM_ERR(CAM_ISP,
				"Acquire IFE CSID IPP resource Failed");
@@ -1341,6 +1368,18 @@ static int cam_ife_mgr_acquire_hw_for_ctx(
		}
	}

	if (ppp_count) {
		/* get ife csid PPP resource */
		rc = cam_ife_hw_mgr_acquire_res_ife_csid_pxl(ife_ctx,
			in_port, false);
		if (rc) {
			CAM_ERR(CAM_ISP,
				"Acquire IFE CSID PPP resource Failed");
			goto err;
		}
	}


	/* get ife src resource */
	rc = cam_ife_hw_mgr_acquire_res_ife_src(ife_ctx, in_port);
	if (rc) {
@@ -1354,7 +1393,7 @@ static int cam_ife_mgr_acquire_hw_for_ctx(
		goto err;
	}

	*num_pix_port += pixel_count;
	*num_pix_port += ipp_count + ppp_count;
	*num_rdi_port += rdi_count;

	return 0;
@@ -1546,6 +1585,8 @@ static int cam_isp_blob_bw_update(
	uint64_t                               ext_bw_bps = 0;
	int                                    rc = -EINVAL;
	uint32_t                               i;
	bool                                   camif_l_bw_updated = false;
	bool                                   camif_r_bw_updated = false;

	CAM_DBG(CAM_ISP,
		"usage=%u left cam_bw_bps=%llu ext_bw_bps=%llu\n"
@@ -1563,15 +1604,25 @@ static int cam_isp_blob_bw_update(

			if (hw_mgr_res->res_id == CAM_ISP_HW_VFE_IN_CAMIF)
				if (i == CAM_ISP_HW_SPLIT_LEFT) {
					if (camif_l_bw_updated)
						continue;

					cam_bw_bps =
					bw_config->left_pix_vote.cam_bw_bps;
					ext_bw_bps =
					bw_config->left_pix_vote.ext_bw_bps;

					camif_l_bw_updated = true;
				} else {
					if (camif_r_bw_updated)
						continue;

					cam_bw_bps =
					bw_config->right_pix_vote.cam_bw_bps;
					ext_bw_bps =
					bw_config->right_pix_vote.ext_bw_bps;

					camif_r_bw_updated = true;
				}
			else if ((hw_mgr_res->res_id >= CAM_ISP_HW_VFE_IN_RDI0)
						&& (hw_mgr_res->res_id <=
@@ -1585,6 +1636,29 @@ static int cam_isp_blob_bw_update(
					bw_config->rdi_vote[idx].cam_bw_bps;
				ext_bw_bps =
					bw_config->rdi_vote[idx].ext_bw_bps;
			} else if (hw_mgr_res->res_id ==
				CAM_ISP_HW_VFE_IN_CAMIF_LITE) {
				if (i == CAM_ISP_HW_SPLIT_LEFT) {
					if (camif_l_bw_updated)
						continue;

					cam_bw_bps =
					bw_config->left_pix_vote.cam_bw_bps;
					ext_bw_bps =
					bw_config->left_pix_vote.ext_bw_bps;

					camif_l_bw_updated = true;
				} else {
					if (camif_r_bw_updated)
						continue;

					cam_bw_bps =
					bw_config->right_pix_vote.cam_bw_bps;
					ext_bw_bps =
					bw_config->right_pix_vote.ext_bw_bps;

					camif_r_bw_updated = true;
				}
			} else
				if (hw_mgr_res->hw_res[i]) {
					CAM_ERR(CAM_ISP, "Invalid res_id %u",
@@ -2559,6 +2633,8 @@ static int cam_isp_blob_clock_update(
	int                                    rc = -EINVAL;
	uint32_t                               i;
	uint32_t                               j;
	bool                                   camif_l_clk_updated = false;
	bool                                   camif_r_clk_updated = false;

	ctx = prepare->ctxt_to_hw_map;

@@ -2574,16 +2650,46 @@ static int cam_isp_blob_clock_update(
			if (!hw_mgr_res->hw_res[i])
				continue;

			if (hw_mgr_res->res_id == CAM_ISP_HW_VFE_IN_CAMIF)
				if (i == CAM_ISP_HW_SPLIT_LEFT)
			if (hw_mgr_res->res_id == CAM_ISP_HW_VFE_IN_CAMIF) {
				if (i == CAM_ISP_HW_SPLIT_LEFT) {
					if (camif_l_clk_updated)
						continue;

					clk_rate =
						clock_config->left_pix_hz;
				else

					camif_l_clk_updated = true;
				} else {
					if (camif_r_clk_updated)
						continue;

					clk_rate =
						clock_config->right_pix_hz;
			else if ((hw_mgr_res->res_id >= CAM_ISP_HW_VFE_IN_RDI0)
					&& (hw_mgr_res->res_id <=
					CAM_ISP_HW_VFE_IN_RDI3))

					camif_r_clk_updated = true;
				}
			} else if (hw_mgr_res->res_id ==
				CAM_ISP_HW_VFE_IN_CAMIF_LITE) {
				if (i == CAM_ISP_HW_SPLIT_LEFT) {
					if (camif_l_clk_updated)
						continue;

					clk_rate =
						clock_config->left_pix_hz;

					camif_l_clk_updated = true;
				} else {
					if (camif_r_clk_updated)
						continue;

					clk_rate =
						clock_config->right_pix_hz;

					camif_r_clk_updated = true;
				}
			} else if ((hw_mgr_res->res_id >=
				CAM_ISP_HW_VFE_IN_RDI0) && (hw_mgr_res->res_id
				<= CAM_ISP_HW_VFE_IN_RDI3))
				for (j = 0; j < clock_config->num_rdi; j++)
					clk_rate = max(clock_config->rdi_hz[j],
						clk_rate);
@@ -3362,6 +3468,8 @@ static int cam_ife_hw_mgr_handle_reg_update(
		CAM_DBG(CAM_ISP, "resource id = %d, curr_core_idx = %d",
			 ife_src_res->res_id, core_idx);
		switch (ife_src_res->res_id) {
		case CAM_ISP_HW_VFE_IN_CAMIF_LITE:
			break;
		case CAM_ISP_HW_VFE_IN_CAMIF:
			if (ife_src_res->is_dual_vfe)
				/* It checks for slave core RUP ACK*/
@@ -3797,6 +3905,8 @@ static int cam_ife_hw_mgr_handle_sof(
				sof_sent = true;
			}
			break;
		case CAM_ISP_HW_VFE_IN_CAMIF_LITE:
			break;
		default:
			CAM_ERR(CAM_ISP, "Invalid resource id :%d",
				ife_src_res->res_id);
+40 −37
Original line number Diff line number Diff line
@@ -15,41 +15,41 @@

#include "cam_ife_csid_core.h"

static struct cam_ife_csid_ipp_reg_offset  cam_ife_csid_170_ipp_reg_offset = {
	.csid_ipp_irq_status_addr            = 0x30,
	.csid_ipp_irq_mask_addr              = 0x34,
	.csid_ipp_irq_clear_addr             = 0x38,
	.csid_ipp_irq_set_addr               = 0x3c,
static struct cam_ife_csid_pxl_reg_offset  cam_ife_csid_170_ipp_reg_offset = {
	.csid_pxl_irq_status_addr            = 0x30,
	.csid_pxl_irq_mask_addr              = 0x34,
	.csid_pxl_irq_clear_addr             = 0x38,
	.csid_pxl_irq_set_addr               = 0x3c,

	.csid_ipp_cfg0_addr                  = 0x200,
	.csid_ipp_cfg1_addr                  = 0x204,
	.csid_ipp_ctrl_addr                  = 0x208,
	.csid_ipp_frm_drop_pattern_addr      = 0x20c,
	.csid_ipp_frm_drop_period_addr       = 0x210,
	.csid_ipp_irq_subsample_pattern_addr = 0x214,
	.csid_ipp_irq_subsample_period_addr  = 0x218,
	.csid_ipp_hcrop_addr                 = 0x21c,
	.csid_ipp_vcrop_addr                 = 0x220,
	.csid_ipp_pix_drop_pattern_addr      = 0x224,
	.csid_ipp_pix_drop_period_addr       = 0x228,
	.csid_ipp_line_drop_pattern_addr     = 0x22c,
	.csid_ipp_line_drop_period_addr      = 0x230,
	.csid_ipp_rst_strobes_addr           = 0x240,
	.csid_ipp_status_addr                = 0x254,
	.csid_ipp_misr_val_addr              = 0x258,
	.csid_ipp_format_measure_cfg0_addr   = 0x270,
	.csid_ipp_format_measure_cfg1_addr   = 0x274,
	.csid_ipp_format_measure0_addr       = 0x278,
	.csid_ipp_format_measure1_addr       = 0x27c,
	.csid_ipp_format_measure2_addr       = 0x280,
	.csid_ipp_timestamp_curr0_sof_addr   = 0x290,
	.csid_ipp_timestamp_curr1_sof_addr   = 0x294,
	.csid_ipp_timestamp_perv0_sof_addr   = 0x298,
	.csid_ipp_timestamp_perv1_sof_addr   = 0x29c,
	.csid_ipp_timestamp_curr0_eof_addr   = 0x2a0,
	.csid_ipp_timestamp_curr1_eof_addr   = 0x2a4,
	.csid_ipp_timestamp_perv0_eof_addr   = 0x2a8,
	.csid_ipp_timestamp_perv1_eof_addr   = 0x2ac,
	.csid_pxl_cfg0_addr                  = 0x200,
	.csid_pxl_cfg1_addr                  = 0x204,
	.csid_pxl_ctrl_addr                  = 0x208,
	.csid_pxl_frm_drop_pattern_addr      = 0x20c,
	.csid_pxl_frm_drop_period_addr       = 0x210,
	.csid_pxl_irq_subsample_pattern_addr = 0x214,
	.csid_pxl_irq_subsample_period_addr  = 0x218,
	.csid_pxl_hcrop_addr                 = 0x21c,
	.csid_pxl_vcrop_addr                 = 0x220,
	.csid_pxl_pix_drop_pattern_addr      = 0x224,
	.csid_pxl_pix_drop_period_addr       = 0x228,
	.csid_pxl_line_drop_pattern_addr     = 0x22c,
	.csid_pxl_line_drop_period_addr      = 0x230,
	.csid_pxl_rst_strobes_addr           = 0x240,
	.csid_pxl_status_addr                = 0x254,
	.csid_pxl_misr_val_addr              = 0x258,
	.csid_pxl_format_measure_cfg0_addr   = 0x270,
	.csid_pxl_format_measure_cfg1_addr   = 0x274,
	.csid_pxl_format_measure0_addr       = 0x278,
	.csid_pxl_format_measure1_addr       = 0x27c,
	.csid_pxl_format_measure2_addr       = 0x280,
	.csid_pxl_timestamp_curr0_sof_addr   = 0x290,
	.csid_pxl_timestamp_curr1_sof_addr   = 0x294,
	.csid_pxl_timestamp_perv0_sof_addr   = 0x298,
	.csid_pxl_timestamp_perv1_sof_addr   = 0x29c,
	.csid_pxl_timestamp_curr0_eof_addr   = 0x2a0,
	.csid_pxl_timestamp_curr1_eof_addr   = 0x2a4,
	.csid_pxl_timestamp_perv0_eof_addr   = 0x2a8,
	.csid_pxl_timestamp_perv1_eof_addr   = 0x2ac,
	/* configurations */
	.pix_store_en_shift_val              = 7,
};
@@ -269,8 +269,9 @@ static struct cam_ife_csid_common_reg_offset
	.major_version                                = 1,
	.minor_version                                = 7,
	.version_incr                                 = 0,
	.no_rdis                                      = 3,
	.no_pix                                       = 1,
	.num_rdis                                     = 3,
	.num_pix                                      = 1,
	.num_ppp                                      = 0,
	.csid_rst_stb                                 = 0x1e,
	.csid_rst_stb_sw_all                          = 0x1f,
	.path_rst_stb_all                             = 0x7f,
@@ -286,12 +287,14 @@ static struct cam_ife_csid_common_reg_offset
	.crop_shift                                   = 16,
	.ipp_irq_mask_all                             = 0x7FFF,
	.rdi_irq_mask_all                             = 0x7FFF,
	.ppp_irq_mask_all                             = 0x0,
};

struct cam_ife_csid_reg_offset cam_ife_csid_170_reg_offset = {
static struct cam_ife_csid_reg_offset cam_ife_csid_170_reg_offset = {
	.cmn_reg          = &cam_ife_csid_170_cmn_reg_offset,
	.csi2_reg         = &cam_ife_csid_170_csi2_reg_offset,
	.ipp_reg          = &cam_ife_csid_170_ipp_reg_offset,
	.ppp_reg          = NULL,
	.rdi_reg = {
		&cam_ife_csid_170_rdi_0_reg_offset,
		&cam_ife_csid_170_rdi_1_reg_offset,
+347 −0

File added.

Preview size limit exceeded, changes collapsed.

+20 −13
Original line number Diff line number Diff line
@@ -14,51 +14,58 @@
#include <linux/module.h>
#include "cam_ife_csid_core.h"
#include "cam_ife_csid170.h"
#include "cam_ife_csid175.h"
#include "cam_ife_csid_dev.h"

#define CAM_CSID_DRV_NAME                    "csid_170"
#define CAM_CSID_DRV_NAME                    "csid_17x"
#define CAM_CSID_VERSION_V170                 0x10070000
#define CAM_CSID_VERSION_V175                 0x10070050

static struct cam_ife_csid_hw_info cam_ife_csid170_hw_info = {
	.csid_reg = &cam_ife_csid_170_reg_offset,
	.hw_dts_version = CAM_CSID_VERSION_V170,
};

static const struct of_device_id cam_ife_csid170_dt_match[] = {
static struct cam_ife_csid_hw_info cam_ife_csid175_hw_info = {
	.csid_reg = &cam_ife_csid_175_reg_offset,
	.hw_dts_version = CAM_CSID_VERSION_V175,
};

static const struct of_device_id cam_ife_csid17x_dt_match[] = {
	{
		.compatible = "qcom,csid170",
		.data = &cam_ife_csid170_hw_info,
	},
	{
		.compatible = "qcom,csid175",
		.data = &cam_ife_csid170_hw_info,
		.data = &cam_ife_csid175_hw_info,
	},
	{}
};

MODULE_DEVICE_TABLE(of, cam_ife_csid170_dt_match);
MODULE_DEVICE_TABLE(of, cam_ife_csid17x_dt_match);

static struct platform_driver cam_ife_csid170_driver = {
static struct platform_driver cam_ife_csid17x_driver = {
	.probe = cam_ife_csid_probe,
	.remove = cam_ife_csid_remove,
	.driver = {
		.name = CAM_CSID_DRV_NAME,
		.owner = THIS_MODULE,
		.of_match_table = cam_ife_csid170_dt_match,
		.of_match_table = cam_ife_csid17x_dt_match,
	},
};

static int __init cam_ife_csid170_init_module(void)
static int __init cam_ife_csid17x_init_module(void)
{
	return platform_driver_register(&cam_ife_csid170_driver);
	return platform_driver_register(&cam_ife_csid17x_driver);
}

static void __exit cam_ife_csid170_exit_module(void)
static void __exit cam_ife_csid17x_exit_module(void)
{
	platform_driver_unregister(&cam_ife_csid170_driver);
	platform_driver_unregister(&cam_ife_csid17x_driver);
}

module_init(cam_ife_csid170_init_module);
module_exit(cam_ife_csid170_exit_module);
MODULE_DESCRIPTION("CAM IFE_CSID170 driver");
module_init(cam_ife_csid17x_init_module);
module_exit(cam_ife_csid17x_exit_module);
MODULE_DESCRIPTION("CAM IFE_CSID17X driver");
MODULE_LICENSE("GPL v2");
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