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Commit 2432cbe4 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus 

Pull MIPS fixes from Ralf Baechle:
 "Random fixes across the MIPS tree.  The two hotspots are several bugs
  in the module loader and the ath79 SOC support; also noteworthy is the
  restructuring of the code to synchronize CPU timers across CPUs on
  startup; the old code recently ceased to work due to unrelated
  changes.

  All except one of these patches have sat for a significant time in
  linux-next for testing."

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: pci-ar724x: avoid data bus error due to a missing PCIe module
  MIPS: Malta: Delete duplicate PCI fixup.
  MIPS: ath79: don't hardcode the unavailability of the DSP ASE
  MIPS: Synchronize MIPS count one CPU at a time
  MIPS: BCM63xx: Fix SPI message control register handling for BCM6338/6348.
  MIPS: Module: Deal with malformed HI16/LO16 relocation sequences.
  MIPS: Fix race condition in module relocation code.
  MIPS: Fix memory leak in error path of HI16/LO16 relocation handling.
  MIPS: MTX-1: Add udelay to mtx1_pci_idsel
  MIPS: ath79: select HAVE_CLK
  MIPS: ath79: Use correct IRQ number for the OHCI controller on AR7240
  MIPS: ath79: Fix number of GPIO lines for AR724[12]
  MIPS: Octeon: Fix broken interrupt controller code.
parents 8497ae61 a1dca315

arch/mips/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -89,6 +89,7 @@ config ATH79 
	select CEVT_R4K

	select CSRC_R4K

	select DMA_NONCOHERENT

	select HAVE_CLK

	select IRQ_CPU

	select MIPS_MACHINE

	select SYS_HAS_CPU_MIPS32_R2

arch/mips/alchemy/board-mtx1.c

+2 −0
Original line number Diff line number Diff line
@@ -228,6 +228,8 @@ static int mtx1_pci_idsel(unsigned int devsel, int assert) 
	 * adapter on the mtx-1 "singleboard" variant. It triggers a custom

	 * logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals.

	 */

	udelay(1);



	if (assert && devsel != 0)

		/* Suppress signal to Cardbus */

		alchemy_gpio_set_value(1, 0);	/* set EXT_IO3 OFF */

arch/mips/ath79/dev-usb.c

+2 −0
Original line number Diff line number Diff line
@@ -145,6 +145,8 @@ static void __init ar7240_usb_setup(void) 


	ath79_ohci_resources[0].start = AR7240_OHCI_BASE;

	ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;

	ath79_ohci_resources[1].start = ATH79_CPU_IRQ_USB;

	ath79_ohci_resources[1].end = ATH79_CPU_IRQ_USB;

	platform_device_register(&ath79_ohci_device);

}

arch/mips/ath79/gpio.c

+4 −2
Original line number Diff line number Diff line
@@ -188,8 +188,10 @@ void __init ath79_gpio_init(void) 


	if (soc_is_ar71xx())

		ath79_gpio_count = AR71XX_GPIO_COUNT;

	else if (soc_is_ar724x())

		ath79_gpio_count = AR724X_GPIO_COUNT;

	else if (soc_is_ar7240())

		ath79_gpio_count = AR7240_GPIO_COUNT;

	else if (soc_is_ar7241() || soc_is_ar7242())

		ath79_gpio_count = AR7241_GPIO_COUNT;

	else if (soc_is_ar913x())

		ath79_gpio_count = AR913X_GPIO_COUNT;

	else if (soc_is_ar933x())

arch/mips/bcm63xx/dev-spi.c

+4 −0
Original line number Diff line number Diff line
@@ -106,11 +106,15 @@ int __init bcm63xx_spi_register(void) 
	if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {

		spi_resources[0].end += BCM_6338_RSET_SPI_SIZE - 1;

		spi_pdata.fifo_size = SPI_6338_MSG_DATA_SIZE;

		spi_pdata.msg_type_shift = SPI_6338_MSG_TYPE_SHIFT;

		spi_pdata.msg_ctl_width = SPI_6338_MSG_CTL_WIDTH;

	}



	if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) {

		spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;

		spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;

		spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT;

		spi_pdata.msg_ctl_width = SPI_6358_MSG_CTL_WIDTH;

	}



	bcm63xx_spi_regs_init();