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Commit 21b13791 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/pmu: namespace + nvidia gpu names (no binary change) 



The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 42594600

drivers/gpu/drm/nouveau/include/nvkm/core/os.h

+4 −0
Original line number Diff line number Diff line
@@ -209,6 +209,10 @@ 
#define nouveau_volt nvkm_volt

#define nouveau_timer nvkm_timer

#define nouveau_timer_wait_eq nvkm_timer_wait_eq

#define nouveau_timer_alarm nvkm_timer_alarm

#define nouveau_alarm nvkm_alarm

#define nouveau_timer_alarm_cancel nvkm_timer_alarm_cancel

#define nouveau_alarm_init nvkm_alarm_init

#define nva3_pll_calc gt215_pll_calc

#define nouveau_clk nvkm_clk

#define nouveau_domain nvkm_domain

drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h

+26 −30
Original line number Diff line number Diff line 
#ifndef __NOUVEAU_PMU_H__

#define __NOUVEAU_PMU_H__



#ifndef __NVKM_PMU_H__

#define __NVKM_PMU_H__

#include <core/subdev.h>

#include <core/device.h>



struct nouveau_pmu {

	struct nouveau_subdev base;

struct nvkm_pmu {

	struct nvkm_subdev base;



	struct {

		u32 base;
@@ -23,35 +21,33 @@ struct nouveau_pmu { 
		u32 data[2];

	} recv;



	int  (*message)(struct nouveau_pmu *, u32[2], u32, u32, u32, u32);

	void (*pgob)(struct nouveau_pmu *, bool);

	int  (*message)(struct nvkm_pmu *, u32[2], u32, u32, u32, u32);

	void (*pgob)(struct nvkm_pmu *, bool);

};



static inline struct nouveau_pmu *

nouveau_pmu(void *obj)

static inline struct nvkm_pmu *

nvkm_pmu(void *obj)

{

	return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_PMU);

	return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_PMU);

}



extern struct nouveau_oclass *nva3_pmu_oclass;

extern struct nouveau_oclass *nvc0_pmu_oclass;

extern struct nouveau_oclass *nvd0_pmu_oclass;

extern struct nouveau_oclass *gk104_pmu_oclass;

extern struct nouveau_oclass *nv108_pmu_oclass;

extern struct nouveau_oclass *gk20a_pmu_oclass;

extern struct nvkm_oclass *gt215_pmu_oclass;

extern struct nvkm_oclass *gf100_pmu_oclass;

extern struct nvkm_oclass *gf110_pmu_oclass;

extern struct nvkm_oclass *gk104_pmu_oclass;

extern struct nvkm_oclass *gk208_pmu_oclass;

extern struct nvkm_oclass *gk20a_pmu_oclass;



/* interface to MEMX process running on PMU */

struct nouveau_memx;

int  nouveau_memx_init(struct nouveau_pmu *, struct nouveau_memx **);

int  nouveau_memx_fini(struct nouveau_memx **, bool exec);

void nouveau_memx_wr32(struct nouveau_memx *, u32 addr, u32 data);

void nouveau_memx_wait(struct nouveau_memx *,

		       u32 addr, u32 mask, u32 data, u32 nsec);

void nouveau_memx_nsec(struct nouveau_memx *, u32 nsec);

void nouveau_memx_wait_vblank(struct nouveau_memx *);

void nouveau_memx_train(struct nouveau_memx *);

int  nouveau_memx_train_result(struct nouveau_pmu *, u32 *, int);

void nouveau_memx_block(struct nouveau_memx *);

void nouveau_memx_unblock(struct nouveau_memx *);



struct nvkm_memx;

int  nvkm_memx_init(struct nvkm_pmu *, struct nvkm_memx **);

int  nvkm_memx_fini(struct nvkm_memx **, bool exec);

void nvkm_memx_wr32(struct nvkm_memx *, u32 addr, u32 data);

void nvkm_memx_wait(struct nvkm_memx *, u32 addr, u32 mask, u32 data, u32 nsec);

void nvkm_memx_nsec(struct nvkm_memx *, u32 nsec);

void nvkm_memx_wait_vblank(struct nvkm_memx *);

void nvkm_memx_train(struct nvkm_memx *);

int  nvkm_memx_train_result(struct nvkm_pmu *, u32 *, int);

void nvkm_memx_block(struct nvkm_memx *);

void nvkm_memx_unblock(struct nvkm_memx *);

#endif

drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c

+2 −2
Original line number Diff line number Diff line
@@ -78,7 +78,7 @@ gm100_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nv108_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;



#if 0

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -122,7 +122,7 @@ gm100_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nv108_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;

#if 0

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

#endif

drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c

+4 −4
Original line number Diff line number Diff line
@@ -365,7 +365,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &nv50_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nva3_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gt215_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
@@ -396,7 +396,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &nv50_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nva3_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gt215_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
@@ -426,7 +426,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &nv50_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nva3_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gt215_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;
@@ -456,7 +456,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &nv50_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nv50_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nva3_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gt215_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv84_fifo_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c

+8 −8
Original line number Diff line number Diff line
@@ -78,7 +78,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nvc0_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
@@ -111,7 +111,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nvc0_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
@@ -144,7 +144,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nvc0_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
@@ -176,7 +176,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nvc0_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
@@ -209,7 +209,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nvc0_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
@@ -241,7 +241,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nvc0_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
@@ -273,7 +273,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nvc0_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;
@@ -306,7 +306,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  nvd0_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;