Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 21124e5c authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2014-11-27' of git://anongit.freedesktop.org/drm-intel into drm-fixes 

Two regression fixes from Ville.

* tag 'drm-intel-fixes-2014-11-27' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Cancel vdd off work before suspend
  drm/i915: Ignore SURFLIVE and flip counter when the GPU gets reset
parents 8e4890fb afa4e53a

drivers/gpu/drm/i915/intel_display.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -9408,6 +9408,10 @@ static bool page_flip_finished(struct intel_crtc *crtc) 
	struct drm_device *dev = crtc->base.dev;

	struct drm_device *dev = crtc->base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = dev->dev_private;





	if (i915_reset_in_progress(&dev_priv->gpu_error) ||

	    crtc->reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter))

		return true;



	/*

	/*

	 * The relevant registers doen't exist on pre-ctg.

	 * The relevant registers doen't exist on pre-ctg.

	 * As the flip done interrupt doesn't trigger for mmio

	 * As the flip done interrupt doesn't trigger for mmio

drivers/gpu/drm/i915/intel_dp.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -4450,6 +4450,7 @@ static void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder) 
	 * vdd might still be enabled do to the delayed vdd off.

	 * vdd might still be enabled do to the delayed vdd off.

	 * Make sure vdd is actually turned off here.

	 * Make sure vdd is actually turned off here.

	 */

	 */

	cancel_delayed_work_sync(&intel_dp->panel_vdd_work);

	pps_lock(intel_dp);

	pps_lock(intel_dp);

	edp_panel_vdd_off_sync(intel_dp);

	edp_panel_vdd_off_sync(intel_dp);

	pps_unlock(intel_dp);

	pps_unlock(intel_dp);