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Commit 20dbb253 authored by Lakshmi Narayana Kalavala's avatar Lakshmi Narayana Kalavala
Browse files

drm/msm/sde: fix watchdog vsync timer configuration 



Fix the incorrect values for the watchdog vsync timer
with proper hexadecimal values.

Change-Id: Iddaf36018a7f6521f7da32349afd64c5ebe79060
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
Signed-off-by: default avatarLakshmi Narayana Kalavala <lkalaval@codeaurora.org>
parent 871eac76

drivers/gpu/drm/msm/sde/sde_hw_mdss.h

+5 −5
Original line number Diff line number Diff line
@@ -92,11 +92,11 @@ enum sde_format_flags { 
#define SDE_VSYNC_SOURCE_INTF_1		4

#define SDE_VSYNC_SOURCE_INTF_2		5

#define SDE_VSYNC_SOURCE_INTF_3		6

#define SDE_VSYNC_SOURCE_WD_TIMER_4	11

#define SDE_VSYNC_SOURCE_WD_TIMER_3	12

#define SDE_VSYNC_SOURCE_WD_TIMER_2	13

#define SDE_VSYNC_SOURCE_WD_TIMER_1	14

#define SDE_VSYNC_SOURCE_WD_TIMER_0	15

#define SDE_VSYNC_SOURCE_WD_TIMER_4	0x11

#define SDE_VSYNC_SOURCE_WD_TIMER_3	0x12

#define SDE_VSYNC_SOURCE_WD_TIMER_2	0x13

#define SDE_VSYNC_SOURCE_WD_TIMER_1	0x14

#define SDE_VSYNC_SOURCE_WD_TIMER_0	0x15



enum sde_hw_blk_type {

	SDE_HW_BLK_TOP = 0,