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Commit 20d4b107 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Mark Brown
Browse files

ASoC: davinci-mcasp: Use defines for clkdiv IDs 



Instead of hardwired IDs add defines for the available dividers.

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 19357366

sound/soc/davinci/davinci-mcasp.c

+4 −3
Original line number Diff line number Diff line
@@ -547,14 +547,14 @@ static int __davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id, 


	pm_runtime_get_sync(mcasp->dev);

	switch (div_id) {

	case 0:		/* MCLK divider */

	case MCASP_CLKDIV_AUXCLK:			/* MCLK divider */

		mcasp_mod_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG,

			       AHCLKXDIV(div - 1), AHCLKXDIV_MASK);

		mcasp_mod_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG,

			       AHCLKRDIV(div - 1), AHCLKRDIV_MASK);

		break;



	case 1:		/* BCLK divider */

	case MCASP_CLKDIV_BCLK:			/* BCLK divider */

		mcasp_mod_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG,

			       ACLKXDIV(div - 1), ACLKXDIV_MASK);

		mcasp_mod_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG,
@@ -563,7 +563,8 @@ static int __davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id, 
			mcasp->bclk_div = div;

		break;



	case 2:	/*

	case MCASP_CLKDIV_BCLK_FS_RATIO:

		/*

		 * BCLK/LRCLK ratio descries how many bit-clock cycles

		 * fit into one frame. The clock ratio is given for a

		 * full period of data (for I2S format both left and

sound/soc/davinci/davinci-mcasp.h

+5 −0
Original line number Diff line number Diff line
@@ -306,4 +306,9 @@ 
#define NUMEVT(x)	(((x) & 0xFF) << 8)

#define NUMDMA_MASK	(0xFF)



/* clock divider IDs */

#define MCASP_CLKDIV_AUXCLK		0 /* HCLK divider from AUXCLK */

#define MCASP_CLKDIV_BCLK		1 /* BCLK divider from HCLK */

#define MCASP_CLKDIV_BCLK_FS_RATIO	2 /* to set BCLK FS ration */



#endif	/* DAVINCI_MCASP_H */