Loading drivers/bus/mhi/core/mhi_boot.c +3 −3 Original line number Diff line number Diff line Loading @@ -54,7 +54,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl) struct image_info *rddm_image = mhi_cntrl->rddm_image; const u32 delayus = 100; u32 retry = (mhi_cntrl->timeout_ms * 1000) / delayus; void __iomem *base = mhi_cntrl->bhi; void __iomem *base = mhi_cntrl->bhie; MHI_LOG("Entered with pm_state:%s dev_state:%s ee:%s\n", to_mhi_pm_state_str(mhi_cntrl->pm_state), Loading Loading @@ -137,7 +137,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl) /* download ramdump image from device */ int mhi_download_rddm_img(struct mhi_controller *mhi_cntrl, bool in_panic) { void __iomem *base = mhi_cntrl->bhi; void __iomem *base = mhi_cntrl->bhie; rwlock_t *pm_lock = &mhi_cntrl->pm_lock; struct image_info *rddm_image = mhi_cntrl->rddm_image; struct mhi_buf *mhi_buf; Loading Loading @@ -219,7 +219,7 @@ EXPORT_SYMBOL(mhi_download_rddm_img); static int mhi_fw_load_amss(struct mhi_controller *mhi_cntrl, const struct mhi_buf *mhi_buf) { void __iomem *base = mhi_cntrl->bhi; void __iomem *base = mhi_cntrl->bhie; rwlock_t *pm_lock = &mhi_cntrl->pm_lock; u32 tx_status; Loading drivers/bus/mhi/core/mhi_internal.h +15 −12 Original line number Diff line number Diff line Loading @@ -48,6 +48,10 @@ extern struct bus_type mhi_bus_type; #define BHIOFF_BHIOFF_MASK (0xFFFFFFFF) #define BHIOFF_BHIOFF_SHIFT (0) #define BHIEOFF (0x2C) #define BHIEOFF_BHIEOFF_MASK (0xFFFFFFFF) #define BHIEOFF_BHIEOFF_SHIFT (0) #define DEBUGOFF (0x30) #define DEBUGOFF_DEBUGOFF_MASK (0xFFFFFFFF) #define DEBUGOFF_DEBUGOFF_SHIFT (0) Loading Loading @@ -186,15 +190,14 @@ extern struct bus_type mhi_bus_type; #define BHI_STATUS_RESET (0) /* MHI BHIE offsets */ #define BHIE_OFFSET (0x0124) /* BHIE register space offset from BHI base */ #define BHIE_MSMSOCID_OFFS (BHIE_OFFSET + 0x0000) #define BHIE_TXVECADDR_LOW_OFFS (BHIE_OFFSET + 0x002C) #define BHIE_TXVECADDR_HIGH_OFFS (BHIE_OFFSET + 0x0030) #define BHIE_TXVECSIZE_OFFS (BHIE_OFFSET + 0x0034) #define BHIE_TXVECDB_OFFS (BHIE_OFFSET + 0x003C) #define BHIE_MSMSOCID_OFFS (0x0000) #define BHIE_TXVECADDR_LOW_OFFS (0x002C) #define BHIE_TXVECADDR_HIGH_OFFS (0x0030) #define BHIE_TXVECSIZE_OFFS (0x0034) #define BHIE_TXVECDB_OFFS (0x003C) #define BHIE_TXVECDB_SEQNUM_BMSK (0x3FFFFFFF) #define BHIE_TXVECDB_SEQNUM_SHFT (0) #define BHIE_TXVECSTATUS_OFFS (BHIE_OFFSET + 0x0044) #define BHIE_TXVECSTATUS_OFFS (0x0044) #define BHIE_TXVECSTATUS_SEQNUM_BMSK (0x3FFFFFFF) #define BHIE_TXVECSTATUS_SEQNUM_SHFT (0) #define BHIE_TXVECSTATUS_STATUS_BMSK (0xC0000000) Loading @@ -202,13 +205,13 @@ extern struct bus_type mhi_bus_type; #define BHIE_TXVECSTATUS_STATUS_RESET (0x00) #define BHIE_TXVECSTATUS_STATUS_XFER_COMPL (0x02) #define BHIE_TXVECSTATUS_STATUS_ERROR (0x03) #define BHIE_RXVECADDR_LOW_OFFS (BHIE_OFFSET + 0x0060) #define BHIE_RXVECADDR_HIGH_OFFS (BHIE_OFFSET + 0x0064) #define BHIE_RXVECSIZE_OFFS (BHIE_OFFSET + 0x0068) #define BHIE_RXVECDB_OFFS (BHIE_OFFSET + 0x0070) #define BHIE_RXVECADDR_LOW_OFFS (0x0060) #define BHIE_RXVECADDR_HIGH_OFFS (0x0064) #define BHIE_RXVECSIZE_OFFS (0x0068) #define BHIE_RXVECDB_OFFS (0x0070) #define BHIE_RXVECDB_SEQNUM_BMSK (0x3FFFFFFF) #define BHIE_RXVECDB_SEQNUM_SHFT (0) #define BHIE_RXVECSTATUS_OFFS (BHIE_OFFSET + 0x0078) #define BHIE_RXVECSTATUS_OFFS (0x0078) #define BHIE_RXVECSTATUS_SEQNUM_BMSK (0x3FFFFFFF) #define BHIE_RXVECSTATUS_SEQNUM_SHFT (0) #define BHIE_RXVECSTATUS_STATUS_BMSK (0xC0000000) Loading drivers/bus/mhi/core/mhi_pm.c +16 −3 Original line number Diff line number Diff line Loading @@ -790,7 +790,7 @@ void mhi_pm_st_worker(struct work_struct *work) int mhi_async_power_up(struct mhi_controller *mhi_cntrl) { int ret; u32 bhi_offset; u32 val; enum MHI_EE current_ee; enum MHI_ST_TRANSITION next_state; Loading Loading @@ -825,14 +825,27 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) /* setup bhi offset & intvec */ write_lock_irq(&mhi_cntrl->pm_lock); ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIOFF, &bhi_offset); ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIOFF, &val); if (ret) { write_unlock_irq(&mhi_cntrl->pm_lock); MHI_ERR("Error getting bhi offset\n"); goto error_bhi_offset; } mhi_cntrl->bhi = mhi_cntrl->regs + bhi_offset; mhi_cntrl->bhi = mhi_cntrl->regs + val; /* setup bhie offset */ if (mhi_cntrl->fbc_download) { ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIEOFF, &val); if (ret) { write_unlock_irq(&mhi_cntrl->pm_lock); MHI_ERR("Error getting bhie offset\n"); goto error_bhi_offset; } mhi_cntrl->bhie = mhi_cntrl->regs + val; } mhi_write_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_INTVEC, 0); mhi_cntrl->pm_state = MHI_PM_POR; mhi_cntrl->ee = MHI_EE_MAX; Loading drivers/bus/mhi/devices/mhi_uci.c +1 −1 Original line number Diff line number Diff line Loading @@ -540,8 +540,8 @@ static void mhi_uci_remove(struct mhi_device *mhi_dev) return; } mutex_unlock(&uci_dev->mutex); MSG_LOG("Exit\n"); mutex_unlock(&uci_dev->mutex); } static int mhi_uci_probe(struct mhi_device *mhi_dev, Loading include/linux/mhi.h +2 −0 Original line number Diff line number Diff line Loading @@ -87,6 +87,7 @@ struct image_info { * @of_node: DT that has MHI configuration information * @regs: Points to base of MHI MMIO register space * @bhi: Points to base of MHI BHI register space * @bhie: Points to base of MHI BHIe register space * @wake_db: MHI WAKE doorbell register address * @dev_id: PCIe device id of the external device * @domain: PCIe domain the device connected to Loading Loading @@ -137,6 +138,7 @@ struct mhi_controller { /* mmio base */ void __iomem *regs; void __iomem *bhi; void __iomem *bhie; void __iomem *wake_db; /* device topology */ Loading Loading
drivers/bus/mhi/core/mhi_boot.c +3 −3 Original line number Diff line number Diff line Loading @@ -54,7 +54,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl) struct image_info *rddm_image = mhi_cntrl->rddm_image; const u32 delayus = 100; u32 retry = (mhi_cntrl->timeout_ms * 1000) / delayus; void __iomem *base = mhi_cntrl->bhi; void __iomem *base = mhi_cntrl->bhie; MHI_LOG("Entered with pm_state:%s dev_state:%s ee:%s\n", to_mhi_pm_state_str(mhi_cntrl->pm_state), Loading Loading @@ -137,7 +137,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl) /* download ramdump image from device */ int mhi_download_rddm_img(struct mhi_controller *mhi_cntrl, bool in_panic) { void __iomem *base = mhi_cntrl->bhi; void __iomem *base = mhi_cntrl->bhie; rwlock_t *pm_lock = &mhi_cntrl->pm_lock; struct image_info *rddm_image = mhi_cntrl->rddm_image; struct mhi_buf *mhi_buf; Loading Loading @@ -219,7 +219,7 @@ EXPORT_SYMBOL(mhi_download_rddm_img); static int mhi_fw_load_amss(struct mhi_controller *mhi_cntrl, const struct mhi_buf *mhi_buf) { void __iomem *base = mhi_cntrl->bhi; void __iomem *base = mhi_cntrl->bhie; rwlock_t *pm_lock = &mhi_cntrl->pm_lock; u32 tx_status; Loading
drivers/bus/mhi/core/mhi_internal.h +15 −12 Original line number Diff line number Diff line Loading @@ -48,6 +48,10 @@ extern struct bus_type mhi_bus_type; #define BHIOFF_BHIOFF_MASK (0xFFFFFFFF) #define BHIOFF_BHIOFF_SHIFT (0) #define BHIEOFF (0x2C) #define BHIEOFF_BHIEOFF_MASK (0xFFFFFFFF) #define BHIEOFF_BHIEOFF_SHIFT (0) #define DEBUGOFF (0x30) #define DEBUGOFF_DEBUGOFF_MASK (0xFFFFFFFF) #define DEBUGOFF_DEBUGOFF_SHIFT (0) Loading Loading @@ -186,15 +190,14 @@ extern struct bus_type mhi_bus_type; #define BHI_STATUS_RESET (0) /* MHI BHIE offsets */ #define BHIE_OFFSET (0x0124) /* BHIE register space offset from BHI base */ #define BHIE_MSMSOCID_OFFS (BHIE_OFFSET + 0x0000) #define BHIE_TXVECADDR_LOW_OFFS (BHIE_OFFSET + 0x002C) #define BHIE_TXVECADDR_HIGH_OFFS (BHIE_OFFSET + 0x0030) #define BHIE_TXVECSIZE_OFFS (BHIE_OFFSET + 0x0034) #define BHIE_TXVECDB_OFFS (BHIE_OFFSET + 0x003C) #define BHIE_MSMSOCID_OFFS (0x0000) #define BHIE_TXVECADDR_LOW_OFFS (0x002C) #define BHIE_TXVECADDR_HIGH_OFFS (0x0030) #define BHIE_TXVECSIZE_OFFS (0x0034) #define BHIE_TXVECDB_OFFS (0x003C) #define BHIE_TXVECDB_SEQNUM_BMSK (0x3FFFFFFF) #define BHIE_TXVECDB_SEQNUM_SHFT (0) #define BHIE_TXVECSTATUS_OFFS (BHIE_OFFSET + 0x0044) #define BHIE_TXVECSTATUS_OFFS (0x0044) #define BHIE_TXVECSTATUS_SEQNUM_BMSK (0x3FFFFFFF) #define BHIE_TXVECSTATUS_SEQNUM_SHFT (0) #define BHIE_TXVECSTATUS_STATUS_BMSK (0xC0000000) Loading @@ -202,13 +205,13 @@ extern struct bus_type mhi_bus_type; #define BHIE_TXVECSTATUS_STATUS_RESET (0x00) #define BHIE_TXVECSTATUS_STATUS_XFER_COMPL (0x02) #define BHIE_TXVECSTATUS_STATUS_ERROR (0x03) #define BHIE_RXVECADDR_LOW_OFFS (BHIE_OFFSET + 0x0060) #define BHIE_RXVECADDR_HIGH_OFFS (BHIE_OFFSET + 0x0064) #define BHIE_RXVECSIZE_OFFS (BHIE_OFFSET + 0x0068) #define BHIE_RXVECDB_OFFS (BHIE_OFFSET + 0x0070) #define BHIE_RXVECADDR_LOW_OFFS (0x0060) #define BHIE_RXVECADDR_HIGH_OFFS (0x0064) #define BHIE_RXVECSIZE_OFFS (0x0068) #define BHIE_RXVECDB_OFFS (0x0070) #define BHIE_RXVECDB_SEQNUM_BMSK (0x3FFFFFFF) #define BHIE_RXVECDB_SEQNUM_SHFT (0) #define BHIE_RXVECSTATUS_OFFS (BHIE_OFFSET + 0x0078) #define BHIE_RXVECSTATUS_OFFS (0x0078) #define BHIE_RXVECSTATUS_SEQNUM_BMSK (0x3FFFFFFF) #define BHIE_RXVECSTATUS_SEQNUM_SHFT (0) #define BHIE_RXVECSTATUS_STATUS_BMSK (0xC0000000) Loading
drivers/bus/mhi/core/mhi_pm.c +16 −3 Original line number Diff line number Diff line Loading @@ -790,7 +790,7 @@ void mhi_pm_st_worker(struct work_struct *work) int mhi_async_power_up(struct mhi_controller *mhi_cntrl) { int ret; u32 bhi_offset; u32 val; enum MHI_EE current_ee; enum MHI_ST_TRANSITION next_state; Loading Loading @@ -825,14 +825,27 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) /* setup bhi offset & intvec */ write_lock_irq(&mhi_cntrl->pm_lock); ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIOFF, &bhi_offset); ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIOFF, &val); if (ret) { write_unlock_irq(&mhi_cntrl->pm_lock); MHI_ERR("Error getting bhi offset\n"); goto error_bhi_offset; } mhi_cntrl->bhi = mhi_cntrl->regs + bhi_offset; mhi_cntrl->bhi = mhi_cntrl->regs + val; /* setup bhie offset */ if (mhi_cntrl->fbc_download) { ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIEOFF, &val); if (ret) { write_unlock_irq(&mhi_cntrl->pm_lock); MHI_ERR("Error getting bhie offset\n"); goto error_bhi_offset; } mhi_cntrl->bhie = mhi_cntrl->regs + val; } mhi_write_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_INTVEC, 0); mhi_cntrl->pm_state = MHI_PM_POR; mhi_cntrl->ee = MHI_EE_MAX; Loading
drivers/bus/mhi/devices/mhi_uci.c +1 −1 Original line number Diff line number Diff line Loading @@ -540,8 +540,8 @@ static void mhi_uci_remove(struct mhi_device *mhi_dev) return; } mutex_unlock(&uci_dev->mutex); MSG_LOG("Exit\n"); mutex_unlock(&uci_dev->mutex); } static int mhi_uci_probe(struct mhi_device *mhi_dev, Loading
include/linux/mhi.h +2 −0 Original line number Diff line number Diff line Loading @@ -87,6 +87,7 @@ struct image_info { * @of_node: DT that has MHI configuration information * @regs: Points to base of MHI MMIO register space * @bhi: Points to base of MHI BHI register space * @bhie: Points to base of MHI BHIe register space * @wake_db: MHI WAKE doorbell register address * @dev_id: PCIe device id of the external device * @domain: PCIe domain the device connected to Loading Loading @@ -137,6 +138,7 @@ struct mhi_controller { /* mmio base */ void __iomem *regs; void __iomem *bhi; void __iomem *bhie; void __iomem *wake_db; /* device topology */ Loading