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Commit 20680737 authored by Taniya Das's avatar Taniya Das
Browse files

clk: qcom: alpha: Update the setrate/enable for slew PLL 



Currently the slew PLL would get calibrated each time the PLL enable is
requested which could result in L/Alpha values set by the PLL set rate.
Avoid the above condition by calibrating the PLL in the set rate path.

Change-Id: Ib83129a7f8ad5c0c8535a7f10c2e60573c06dc1f
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent e2fb8589

drivers/clk/qcom/clk-alpha-pll.c

+14 −20
Original line number Diff line number Diff line
@@ -181,15 +181,10 @@ void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 
{

	u32 val, mask;



	if (config->l)

		regmap_write(regmap, pll->offset + PLL_L_VAL,

						config->l);

	if (config->alpha)

		regmap_write(regmap, pll->offset + PLL_ALPHA_VAL,

						config->alpha);

	if (config->alpha_u)

		regmap_write(regmap, pll->offset + PLL_ALPHA_VAL_U,

						config->alpha_u);

	regmap_write(regmap, pll->offset + PLL_L_VAL, config->l);

	regmap_write(regmap, pll->offset + PLL_ALPHA_VAL, config->alpha);

	regmap_write(regmap, pll->offset + PLL_ALPHA_VAL_U, config->alpha_u);



	if (config->config_ctl_val)

		regmap_write(regmap, pll->offset + PLL_CONFIG_CTL,

				config->config_ctl_val);
@@ -1487,6 +1482,8 @@ static int clk_alpha_pll_slew_update(struct clk_alpha_pll *pll) 
	return ret;

}



static int clk_alpha_pll_calibrate(struct clk_hw *hw);



static int clk_alpha_pll_slew_set_rate(struct clk_hw *hw, unsigned long rate,

			unsigned long parent_rate)

{
@@ -1495,7 +1492,13 @@ static int clk_alpha_pll_slew_set_rate(struct clk_hw *hw, unsigned long rate, 
	const struct pll_vco *curr_vco = NULL, *vco;

	u32 l, ctl;

	u64 a;

	int i = 0;

	int i = 0, rc;



	if (!clk_hw_is_enabled(hw)) {

		rc = clk_alpha_pll_calibrate(hw);

		if (rc)

			return rc;

	}



	freq_hz = alpha_pll_round_rate(pll, rate, parent_rate, &l, &a);

	if (freq_hz != rate) {
@@ -1594,7 +1597,6 @@ static int clk_alpha_pll_calibrate(struct clk_hw *hw) 
	calibration_freq = (pll->vco_table[0].min_freq +

					pll->vco_table[0].max_freq)/2;





	freq_hz = alpha_pll_round_rate(pll, calibration_freq,

				clk_hw_get_rate(parent), &l, &a);

	if (freq_hz != calibration_freq) {
@@ -1648,15 +1650,7 @@ static int clk_alpha_pll_calibrate(struct clk_hw *hw) 


static int clk_alpha_pll_slew_enable(struct clk_hw *hw)

{

	int rc;



	rc = clk_alpha_pll_calibrate(hw);

	if (rc)

		return rc;



	rc = clk_alpha_pll_enable(hw);



	return rc;

	return clk_alpha_pll_enable(hw);

}



const struct clk_ops clk_alpha_pll_slew_ops = {