Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1ff203ad authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add the debug clock node for QCS405"

parents 6ffadf8a 1047749f

arch/arm/configs/qcs405-perf_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -330,6 +330,7 @@ CONFIG_SPS_SUPPORT_NDP_BAM=y 
CONFIG_COMMON_CLK_QCOM=y

CONFIG_QCOM_CLK_SMD_RPM=y

CONFIG_MDM_GCC_QCS405=y

CONFIG_MDM_DEBUGCC_QCS405=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_MAILBOX=y

arch/arm/configs/qcs405_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -347,6 +347,7 @@ CONFIG_SPS_SUPPORT_NDP_BAM=y 
CONFIG_COMMON_CLK_QCOM=y

CONFIG_QCOM_CLK_SMD_RPM=y

CONFIG_MDM_GCC_QCS405=y

CONFIG_MDM_DEBUGCC_QCS405=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_MAILBOX=y

arch/arm64/boot/dts/qcom/qcs405.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -227,6 +227,14 @@ 
		#reset-cells = <1>;

	};



	clock_debugcc: qcom,cc-debug {

		compatible = "qcom,debugcc-qcs405";

		qcom,gcc = <&clock_gcc>;

		clocks = <&clock_rpmcc RPM_SMD_XO_CLK_SRC>;

		clock-names = "xo_clk_src";

		#clock-cells = <1>;

	};



	clock_cpu: qcom,cpu {

		compatible = "qcom,dummycc";

		clock-output-names = "cpu_clocks";

arch/arm64/configs/qcs405-perf_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -330,6 +330,7 @@ CONFIG_SPS=y 
CONFIG_SPS_SUPPORT_NDP_BAM=y

CONFIG_QCOM_CLK_SMD_RPM=y

CONFIG_MDM_GCC_QCS405=y

CONFIG_MDM_DEBUGCC_QCS405=y

CONFIG_HWSPINLOCK=y

CONFIG_MAILBOX=y

CONFIG_IOMMU_IO_PGTABLE_LPAE=y

arch/arm64/configs/qcs405_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -348,6 +348,7 @@ CONFIG_SPS=y 
CONFIG_SPS_SUPPORT_NDP_BAM=y

CONFIG_QCOM_CLK_SMD_RPM=y

CONFIG_MDM_GCC_QCS405=y

CONFIG_MDM_DEBUGCC_QCS405=y

CONFIG_HWSPINLOCK=y

CONFIG_MAILBOX=y

CONFIG_IOMMU_IO_PGTABLE_LPAE=y