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Commit 1ff1691b authored by Stefan Mätje's avatar Stefan Mätje Committed by Greg Kroah-Hartman
Browse files

PCI: Factor out pcie_retrain_link() function 



commit 86fa6a344209d9414ea962b1f1ac6ade9dd7563a upstream.

Factor out pcie_retrain_link() to use for Pericom Retrain Link quirk.  No
functional change intended.

Signed-off-by: default avatarStefan Mätje <stefan.maetje@esd.eu>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
CC: stable@vger.kernel.org
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 60085139

drivers/pci/pcie/aspm.c

+24 −16
Original line number Diff line number Diff line
@@ -211,6 +211,29 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist) 
	link->clkpm_capable = (blacklist) ? 0 : capable;

}



static bool pcie_retrain_link(struct pcie_link_state *link)

{

	struct pci_dev *parent = link->pdev;

	unsigned long start_jiffies;

	u16 reg16;



	pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &reg16);

	reg16 |= PCI_EXP_LNKCTL_RL;

	pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);



	/* Wait for link training end. Break out after waiting for timeout */

	start_jiffies = jiffies;

	for (;;) {

		pcie_capability_read_word(parent, PCI_EXP_LNKSTA, &reg16);

		if (!(reg16 & PCI_EXP_LNKSTA_LT))

			break;

		if (time_after(jiffies, start_jiffies + LINK_RETRAIN_TIMEOUT))

			break;

		msleep(1);

	}

	return !(reg16 & PCI_EXP_LNKSTA_LT);

}



/*

 * pcie_aspm_configure_common_clock: check if the 2 ends of a link

 *   could use common clock. If they are, configure them to use the
@@ -220,7 +243,6 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link) 
{

	int same_clock = 1;

	u16 reg16, parent_reg, child_reg[8];

	unsigned long start_jiffies;

	struct pci_dev *child, *parent = link->pdev;

	struct pci_bus *linkbus = parent->subordinate;

	/*
@@ -260,21 +282,7 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link) 
		reg16 &= ~PCI_EXP_LNKCTL_CCC;

	pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);



	/* Retrain link */

	reg16 |= PCI_EXP_LNKCTL_RL;

	pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);



	/* Wait for link training end. Break out after waiting for timeout */

	start_jiffies = jiffies;

	for (;;) {

		pcie_capability_read_word(parent, PCI_EXP_LNKSTA, &reg16);

		if (!(reg16 & PCI_EXP_LNKSTA_LT))

			break;

		if (time_after(jiffies, start_jiffies + LINK_RETRAIN_TIMEOUT))

			break;

		msleep(1);

	}

	if (!(reg16 & PCI_EXP_LNKSTA_LT))

	if (pcie_retrain_link(link))

		return;



	/* Training failed. Restore common clock configurations */