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Commit 1e0f139c authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Enable the OSM clock controller for ATOLL"

parents 446c4a3a 82fd90b2

Documentation/devicetree/bindings/arm/msm/qcom,osm.txt

+2 −1
Original line number Diff line number Diff line
@@ -12,7 +12,8 @@ Properties: 
	Definition: must be "qcom,clk-cpu-osm" or "qcom,clk-cpu-osm-sdmshrike"

			or "qcom,clk-cpu-osm-sm6150" or

			"qcom,clk-cpu-osm-sdmmagpie" or

			"qcom,clk-cpu-osm-trinket".

			"qcom,clk-cpu-osm-trinket" or

			"qcom,clk-cpu-osm-atoll".



- reg

	Usage:      required

arch/arm64/boot/dts/qcom/atoll.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
#include "skeleton64.dtsi"

#include <dt-bindings/clock/qcom,aop-qmp.h>

#include <dt-bindings/clock/qcom,camcc-atoll.h>

#include <dt-bindings/clock/qcom,cpucc-sm8150.h>

#include <dt-bindings/clock/qcom,dispcc-atoll.h>

#include <dt-bindings/clock/qcom,gcc-atoll.h>

#include <dt-bindings/clock/qcom,gpucc-atoll.h>
@@ -1541,6 +1542,17 @@ 
		#reset-cells = <1>;

	};



	clock_cpucc: qcom,cpucc@18321000 {

		compatible = "qcom,clk-cpu-osm-atoll";

		reg = <0x18321000 0x1400>,

			<0x18323000 0x1400>,

			<0x18325800 0x1400>;

		reg-names = "osm_l3_base", "osm_pwrcl_base",

			"osm_perfcl_base";

		#clock-cells = <1>;

		status = "disabled";

	};



	tcsr_mutex_block: syscon@01F40000 {

		compatible = "syscon";

		reg = <0x01F40000 0x20000>;

drivers/clk/qcom/clk-cpu-osm.c

+11 −3
Original line number Diff line number Diff line
@@ -89,6 +89,7 @@ static bool is_sdmshrike; 
static bool is_sm6150;

static bool is_sdmmagpie;

static bool is_trinket;

static bool is_atoll;



static inline struct clk_osm *to_clk_osm(struct clk_hw *_hw)

{
@@ -1031,7 +1032,8 @@ static int clk_osm_resources_init(struct platform_device *pdev) 
		return -ENOMEM;

	}



	if (is_sdmshrike || is_sm6150 || is_sdmmagpie || is_trinket)

	if (is_sdmshrike || is_sm6150 || is_sdmmagpie ||

		is_trinket || is_atoll)

		return 0;



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
@@ -1124,9 +1126,13 @@ static int clk_cpu_osm_driver_probe(struct platform_device *pdev) 


	is_sdmshrike = of_device_is_compatible(pdev->dev.of_node,

				"qcom,clk-cpu-osm-sdmshrike");



	is_atoll = of_device_is_compatible(pdev->dev.of_node,

				"qcom,clk-cpu-osm-atoll");



	if (is_sdmshrike)

		clk_cpu_osm_driver_sdmshrike_fixup();

	else if (is_sm6150 || is_sdmmagpie)

	else if (is_sm6150 || is_sdmmagpie || is_atoll)

		clk_cpu_osm_driver_sm6150_fixup();

	else if (is_trinket)

		clk_cpu_osm_driver_trinket_fixup();
@@ -1183,7 +1189,8 @@ static int clk_cpu_osm_driver_probe(struct platform_device *pdev) 
		return rc;

	}



	if (!is_sdmshrike && !is_sm6150 && !is_sdmmagpie && !is_trinket) {

	if (!is_sdmshrike && !is_sm6150 && !is_sdmmagpie &&

		!is_trinket && !is_atoll) {

		rc = clk_osm_read_lut(pdev, &perfpcl_clk);

		if (rc) {

			dev_err(&pdev->dev, "Unable to read OSM LUT for perf plus cluster, rc=%d\n",
@@ -1265,6 +1272,7 @@ static const struct of_device_id match_table[] = { 
	{ .compatible = "qcom,clk-cpu-osm-sdmmagpie" },

	{ .compatible = "qcom,clk-cpu-osm-trinket" },

	{ .compatible = "qcom,clk-cpu-osm-sdmshrike" },

	{ .compatible = "qcom,clk-cpu-osm-atoll" },

	{}

};