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Commit 1d596523 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "Merge remote-tracking branch 'quic/dev/msm-4.14-display' into msm-4.14"

parents b83debfa f22c2833

Documentation/devicetree/bindings/display/msm/sde.txt

+1 −0
Original line number Diff line number Diff line
@@ -426,6 +426,7 @@ Optional properties: 
- qcom,sde-secure-sid-mask:	Array of secure SID masks used during

				secure-camera/secure-display usecases.

- #power-domain-cells:		Number of cells in a power-domain specifier and should contain 0.

- #list-cells:			Number of mdp cells, must be 1.

- qcom,sde-mixer-display-pref:  A string array indicating the preferred display type

				for the mixer block. Possible values:

				"primary" - preferred for primary display

Documentation/devicetree/bindings/media/video/msm-sde-rotator.txt

+4 −0
Original line number Diff line number Diff line
@@ -128,6 +128,10 @@ Optional properties 
- qcom,rot-reg-bus:		Property to provide Bus scaling for register

				access for rotator blocks.

- power-domains:		A phandle to respective power domain node.

- qcom,mdss-rot-parent:		A 2 cell property, with format of (mdp phandle,

				instance id), of mdp device.

- qcom,mdss-rot-xin-id:		An integer array of xin-ids when nrt path for rotation

				is not available.



Subnode properties:

- compatible:		Compatible name used in smmu v2.

drivers/clk/qcom/mdss/mdss-dsi-pll-10nm.c

+1 −1
Original line number Diff line number Diff line
@@ -1171,7 +1171,7 @@ static int vco_10nm_prepare(struct clk_hw *hw) 
	}



	if ((pll->vco_cached_rate != 0) &&

	    (pll->vco_cached_rate == clk_get_rate(hw->clk))) {

	    (pll->vco_cached_rate == clk_hw_get_rate(hw))) {

		rc = hw->init->ops->set_rate(hw, pll->vco_cached_rate,

				pll->vco_cached_rate);

		if (rc) {

drivers/gpu/drm/drm_dp_mst_topology.c

+42 −6
Original line number Diff line number Diff line
@@ -1985,21 +1985,57 @@ EXPORT_SYMBOL(drm_dp_update_payload_part2); 
#if 0 /* unused as of yet */

static int drm_dp_send_dpcd_read(struct drm_dp_mst_topology_mgr *mgr,

				 struct drm_dp_mst_port *port,

				 int offset, int size)

				 int offset, int size, u8 *bytes)

{

	int len;

	int ret;

	struct drm_dp_sideband_msg_tx *txmsg;

	struct drm_dp_mst_branch *mstb;



	memset(bytes, 0, size);



	mstb = drm_dp_get_validated_mstb_ref(mgr, port->parent);

	if (!mstb)

		return -EINVAL;



	txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL);

	if (!txmsg)

		return -ENOMEM;

	if (!txmsg) {

		ret = -ENOMEM;

		goto fail_put;

	}



	len = build_dpcd_read(txmsg, port->port_num, 0, 8);

	txmsg->dst = port->parent;

	len = build_dpcd_read(txmsg, port->port_num, offset, size);

	txmsg->dst = mstb;



	drm_dp_queue_down_tx(mgr, txmsg);

	ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);

	if (ret <= 0) {

		DRM_ERROR("dpcd read failed\n");

		goto fail_free_msg;

	}



	return 0;

	if (txmsg->reply.reply_type == 1) {

		DRM_ERROR("dpcd read nack received\n");

		ret = -EINVAL;

		goto fail_free_msg;

	}



	if (port->port_num != txmsg->reply.u.remote_dpcd_read_ack.port_number) {

		DRM_ERROR("got incorrect port in response\n");

		ret = -EINVAL;

		goto fail_free_msg;

	}



	if (size > txmsg->reply.u.remote_dpcd_read_ack.num_bytes)

		size = txmsg->reply.u.remote_dpcd_read_ack.num_bytes;



	memcpy(bytes, txmsg->reply.u.remote_dpcd_read_ack.bytes, size);



fail_free_msg:

	kfree(txmsg);

fail_put:

	drm_dp_put_mst_branch_device(mstb);

	return ret;

}

#endif

drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c

+6 −1
Original line number Diff line number Diff line
@@ -946,6 +946,7 @@ static int dsi_ctrl_copy_and_pad_cmd(struct dsi_ctrl *dsi_ctrl, 
	int rc = 0;

	u8 *buf = NULL;

	u32 len, i;

	u8 cmd_type = 0;



	len = packet->size;

	len += 0x3; len &= ~0x03; /* Align to 32 bits */
@@ -968,7 +969,11 @@ static int dsi_ctrl_copy_and_pad_cmd(struct dsi_ctrl *dsi_ctrl, 




	/* send embedded BTA for read commands */

	if ((buf[2] & 0x3f) == MIPI_DSI_DCS_READ)

	cmd_type = buf[2] & 0x3f;

	if ((cmd_type == MIPI_DSI_DCS_READ) ||

	    (cmd_type == MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM) ||

	    (cmd_type == MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM) ||

	    (cmd_type == MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM))

		buf[3] |= BIT(5);



	*buffer = buf;