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Commit 1b5f03f3 authored by Taniya Das's avatar Taniya Das Committed by Gerrit - the friendly Code Review server
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clk: qcom: gpucc: Add support for HLOS1_VOTE_GPU_SMMU_CLK



Clock GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK for clients to be able to
request for the clock.

Change-Id: Idd864f5e244ac9e46054a2952360d49848a8a5e3
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 59f01699
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+14 −0
Original line number Diff line number Diff line
@@ -389,6 +389,19 @@ static struct clk_branch gpu_cc_ahb_clk = {
	},
};

static struct clk_branch gpu_cc_hlos1_vote_gpu_smmu_clk = {
	.halt_reg = 0x5000,
	.halt_check = BRANCH_VOTED,
	.clkr = {
		.enable_reg = 0x5000,
		.enable_mask = BIT(0),
		.hw.init = &(struct clk_init_data){
			.name = "gpu_cc_hlos1_vote_gpu_smmu_clk",
			.ops = &clk_branch2_ops,
		},
	},
};

static struct clk_regmap *gpu_cc_trinket_clocks[] = {
	[GPU_CC_CRC_AHB_CLK] = &gpu_cc_crc_ahb_clk.clkr,
	[GPU_CC_CX_APB_CLK] = &gpu_cc_cx_apb_clk.clkr,
@@ -405,6 +418,7 @@ static struct clk_regmap *gpu_cc_trinket_clocks[] = {
	[GPU_CC_GX_GFX3D_CLK] = &gpu_cc_gx_gfx3d_clk.clkr,
	[GPU_CC_GX_GFX3D_CLK_SRC] = &gpu_cc_gx_gfx3d_clk_src.clkr,
	[GPU_CC_AHB_CLK] = &gpu_cc_ahb_clk.clkr,
	[GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK] = &gpu_cc_hlos1_vote_gpu_smmu_clk.clkr,
};

static const struct regmap_config gpu_cc_trinket_regmap_config = {
+1 −0
Original line number Diff line number Diff line
@@ -30,5 +30,6 @@
#define GPU_CC_GX_GFX3D_CLK			12
#define GPU_CC_GX_GFX3D_CLK_SRC			13
#define GPU_CC_AHB_CLK			14
#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK		15

#endif