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Commit 1a4b3848 authored by Steve Cohen's avatar Steve Cohen
Browse files

drm/msm/dp: fix SDP CFG register offsets for MST 



Correct the offset values for DP stream 1 Secondary Data Packet
config registers.

CRs-Fixed: 2325207
Change-Id: I8c30708d9bef5ecf840b072710f6ad9498de66c8
Signed-off-by: default avatarSteve Cohen <cohens@codeaurora.org>
parent 65d04cc7

drivers/gpu/drm/msm/dp/dp_catalog.c

+4 −4
Original line number Diff line number Diff line
@@ -605,8 +605,8 @@ static void dp_catalog_panel_config_hdr(struct dp_catalog_panel *panel, bool en) 


	if (panel->stream_id == DP_STREAM_1) {

		sdp_cfg_off = MMSS_DP1_SDP_CFG - MMSS_DP_SDP_CFG;

		sdp_cfg2_off = MMSS_DP1_SDP_CFG2 - MMSS_DP_SDP_CFG;

		sdp_cfg3_off = MMSS_DP1_SDP_CFG3 - MMSS_DP_SDP_CFG;

		sdp_cfg2_off = MMSS_DP1_SDP_CFG2 - MMSS_DP_SDP_CFG2;

		sdp_cfg3_off = MMSS_DP1_SDP_CFG3 - MMSS_DP_SDP_CFG3;

		misc1_misc0_off = DP1_MISC1_MISC0 - DP_MISC1_MISC0;

	}
@@ -2256,8 +2256,8 @@ static void dp_catalog_panel_config_spd(struct dp_catalog_panel *panel) 


	if (panel->stream_id == DP_STREAM_1) {

		sdp_cfg_off = MMSS_DP1_SDP_CFG - MMSS_DP_SDP_CFG;

		sdp_cfg2_off = MMSS_DP1_SDP_CFG2 - MMSS_DP_SDP_CFG;

		sdp_cfg3_off = MMSS_DP1_SDP_CFG3 - MMSS_DP_SDP_CFG;

		sdp_cfg2_off = MMSS_DP1_SDP_CFG2 - MMSS_DP_SDP_CFG2;

		sdp_cfg3_off = MMSS_DP1_SDP_CFG3 - MMSS_DP_SDP_CFG3;

	}



	spd_cfg = dp_read(catalog->exe_mode, io_data,