Merge "ARM: dts: msm: Update hsphy efuse reg base and mask on SM8150" (1853ae1d) · Commits · e / devices / android_kernel_oneplus_sm8150

Documentation/devicetree/bindings/usb/qcom,msm-phy.txt

+6 −1

Original line number	Diff line number	Diff line
		@@ -25,7 +25,12 @@ Required properties:
		property.

		Optional properties:
		- qcom,param-override-seq: parameter override sequence with value, reg offset pair.
		- qcom,param-override-seq: parameter override sequence with value, reg offset
		pair.
		- qcom,rcal-mask: efuse calibration mask.
		- reg: Address and length of the register set for the device
		Optional regs are:
		"phy_rcal_reg": register address for efuse used for rext calibration

		Example:
		hsphy@f9200000 {

arch/arm64/boot/dts/qcom/sm8150-usb.dtsi

+10 −4

Original line number	Diff line number	Diff line
		@@ -125,8 +125,10 @@
		/* Primary USB port related High Speed PHY */
		usb2_phy0: hsphy@88e2000 {
		compatible = "qcom,usb-hsphy-snps-femto";
		reg = <0x88e2000 0x110>;
		reg-names = "hsusb_phy_base";
		reg = <0x88e2000 0x110>,
		<0x007801f8 0x4>;
		reg-names = "hsusb_phy_base",
		"phy_rcal_reg";

		vdd-supply = <&pm8150_l5>;
		vdda18-supply = <&pm8150_l12>;
		@@ -139,6 +141,7 @@
		resets = <&clock_gcc GCC_QUSB2PHY_PRIM_BCR>;
		reset-names = "phy_reset";
		qcom,param-override-seq = <0x43 0x70>;
		qcom,rcal-mask = <0x1e00000>;
		};

		/* Primary USB port related QMP USB DP Combo PHY */
		@@ -404,8 +407,10 @@
		/* Primary USB port related High Speed PHY */
		usb2_phy1: hsphy@88e3000 {
		compatible = "qcom,usb-hsphy-snps-femto";
		reg = <0x88e3000 0x110>;
		reg-names = "hsusb_phy_base";
		reg = <0x88e3000 0x110>,
		<0x007801f8 0x4>;
		reg-names = "hsusb_phy_base",
		"phy_rcal_reg";

		vdd-supply = <&pm8150_l5>;
		vdda18-supply = <&pm8150_l12>;
		@@ -417,6 +422,7 @@

		resets = <&clock_gcc GCC_QUSB2PHY_SEC_BCR>;
		reset-names = "phy_reset";
		qcom,rcal-mask = <0x1e00000>;

		status = "disabled";
		};

drivers/usb/phy/phy-msm-snps-hs.c

+32 −1

Original line number	Diff line number	Diff line
		@@ -102,6 +102,9 @@ struct msm_hsphy {
		int *param_override_seq;
		int param_override_seq_cnt;

		void __iomem *phy_rcal_reg;
		u32 rcal_mask;

		/* emulation targets specific */
		void __iomem *emu_phy_base;
		int *emu_init_seq;
		@@ -357,6 +360,7 @@ static int msm_hsphy_init(struct usb_phy *uphy)
		{
		struct msm_hsphy *phy = container_of(uphy, struct msm_hsphy, phy);
		int ret;
		u32 rcal_code = 0;

		dev_dbg(uphy->dev, "%s\n", __func__);

		@@ -393,6 +397,15 @@ static int msm_hsphy_init(struct usb_phy *uphy)
		hsusb_phy_write_seq(phy->base, phy->param_override_seq,
		phy->param_override_seq_cnt, 0);

		if (phy->phy_rcal_reg) {
		rcal_code = readl_relaxed(phy->phy_rcal_reg) & phy->rcal_mask;

		dev_dbg(uphy->dev, "rcal_mask:%08x reg:%08x code:%08x\n",
		phy->rcal_mask, phy->phy_rcal_reg, rcal_code);
		}

		/* Use external resistor for tuning if efuse is not programmed */
		if (!rcal_code)
		msm_usb_write_readback(phy->base, USB2PHY_USB_PHY_RTUNE_SEL,
		RTUNE_SEL, RTUNE_SEL);

		@@ -512,6 +525,24 @@ static int msm_hsphy_probe(struct platform_device *pdev)
		goto err_ret;
		}

		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
		"phy_rcal_reg");
		if (res) {
		phy->phy_rcal_reg = devm_ioremap_nocache(dev,
		res->start, resource_size(res));
		if (IS_ERR(phy->phy_rcal_reg)) {
		dev_err(dev, "couldn't ioremap phy_rcal_reg\n");
		phy->phy_rcal_reg = NULL;
		}
		if (of_property_read_u32(dev->of_node,
		"qcom,rcal-mask", &phy->rcal_mask)) {
		dev_err(dev, "unable to read phy rcal mask\n");
		phy->phy_rcal_reg = NULL;
		}
		dev_dbg(dev, "rcal_mask:%08x reg:%08x\n", phy->rcal_mask,
		phy->phy_rcal_reg);
		}

		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
		"emu_phy_base");
		if (res) {