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Commit 17b302c0 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "drm/msm/sde: correct the CTL reset sequence in writeback path"

parents 24efa8ea b90d094e
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+12 −4
Original line number Diff line number Diff line
@@ -1559,13 +1559,21 @@ static void sde_encoder_phys_wb_disable(struct sde_encoder_phys *phys_enc)
	if (phys_enc->hw_ctl->ops.clear_pending_flush)
		phys_enc->hw_ctl->ops.clear_pending_flush(phys_enc->hw_ctl);

	/*
	 * New CTL reset sequence from 5.0 MDP onwards.
	 * If has_3d_merge_reset is not set, legacy reset
	 * sequence is executed.
	 */
	if (hw_wb->catalog->has_3d_merge_reset) {
		sde_encoder_helper_phys_disable(phys_enc, wb_enc);
		goto exit;
	}

	phys_enc->enable_state = SDE_ENC_DISABLING;

	if (hw_wb->catalog->has_3d_merge_reset)
	if (sde_encoder_helper_reset_mixers(phys_enc, wb_enc->fb_disable))
		goto exit;

	phys_enc->enable_state = SDE_ENC_DISABLING;

	sde_encoder_phys_wb_prepare_for_kickoff(phys_enc, NULL);
	sde_encoder_phys_wb_irq_ctrl(phys_enc, true);
	if (phys_enc->hw_ctl->ops.trigger_flush)
+17 −2
Original line number Diff line number Diff line
@@ -3622,7 +3622,21 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
		sde_cfg->delay_prg_fetch_start = true;
		sde_cfg->sui_ns_allowed = true;
		sde_cfg->sui_misr_supported = true;
		sde_cfg->sui_block_xin_mask = 0x2EE1;
		sde_cfg->sui_block_xin_mask = 0x2E61;
		sde_cfg->has_3d_merge_reset = true;
	} else if (IS_SDMMAGPIE_TARGET(hw_rev)) {
		sde_cfg->has_cwb_support = true;
		sde_cfg->has_wb_ubwc = true;
		sde_cfg->has_qsync = true;
		sde_cfg->perf.min_prefill_lines = 24;
		sde_cfg->vbif_qos_nlvl = 8;
		sde_cfg->ts_prefill_rev = 2;
		sde_cfg->ctl_rev = SDE_CTL_CFG_VERSION_1_0_0;
		sde_cfg->delay_prg_fetch_start = true;
		sde_cfg->sui_ns_allowed = true;
		sde_cfg->sui_misr_supported = true;
		sde_cfg->sui_block_xin_mask = 0xE71;
		sde_cfg->has_3d_merge_reset = true;
	} else {
		SDE_ERROR("unsupported chipset id:%X\n", hw_rev);
		sde_cfg->perf.min_prefill_lines = 0xffff;
@@ -3641,7 +3655,8 @@ static int _sde_hardware_post_caps(struct sde_mdss_cfg *sde_cfg,
	if (!sde_cfg)
		return -EINVAL;

	if (IS_SM8150_TARGET(hw_rev) || IS_SM6150_TARGET(hw_rev)) {
	if (IS_SM8150_TARGET(hw_rev) || IS_SM6150_TARGET(hw_rev) ||
			IS_SDMMAGPIE_TARGET(hw_rev)) {
		sde_cfg->sui_supported_blendstage =
			sde_cfg->max_mixer_blendstages - SDE_STAGE_0;

+2 −0
Original line number Diff line number Diff line
@@ -53,6 +53,7 @@
#define SDE_HW_VER_500	SDE_HW_VER(5, 0, 0) /* sm8150 v1.0 */
#define SDE_HW_VER_501	SDE_HW_VER(5, 0, 1) /* sm8150 v2.0 */
#define SDE_HW_VER_510	SDE_HW_VER(5, 1, 0) /* sdmshrike v1.0 */
#define SDE_HW_VER_520	SDE_HW_VER(5, 2, 0) /* sdmmagpie v1.0 */
#define SDE_HW_VER_530	SDE_HW_VER(5, 3, 0) /* sm6150 v1.0 */

#define IS_MSM8996_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_170)
@@ -61,6 +62,7 @@
#define IS_SDM670_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_410)
#define IS_SM8150_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_500)
#define IS_SDMSHRIKE_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_510)
#define IS_SDMMAGPIE_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_520)
#define IS_SM6150_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_530)

#define SDE_HW_BLK_NAME_LEN	16
+2 −1
Original line number Diff line number Diff line
@@ -265,7 +265,8 @@ static void _setup_mixer_ops(struct sde_mdss_cfg *m,
	if (IS_SDM845_TARGET(m->hwversion) || IS_SDM670_TARGET(m->hwversion) ||
			IS_SM8150_TARGET(m->hwversion) ||
			IS_SDMSHRIKE_TARGET(m->hwversion) ||
			IS_SM6150_TARGET(m->hwversion))
			IS_SM6150_TARGET(m->hwversion) ||
			IS_SDMMAGPIE_TARGET(m->hwversion))
		ops->setup_blend_config = sde_hw_lm_setup_blend_config_sdm845;
	else
		ops->setup_blend_config = sde_hw_lm_setup_blend_config;
+2 −1
Original line number Diff line number Diff line
@@ -495,9 +495,10 @@ static void _setup_pingpong_ops(struct sde_hw_pingpong_ops *ops,
		ops->setup_dither = NULL;
		break;
	}
	if (test_bit(SDE_PINGPONG_MERGE_3D, &hw_cap->features))
	if (test_bit(SDE_PINGPONG_MERGE_3D, &hw_cap->features)) {
		ops->setup_3d_mode = sde_hw_pp_setup_3d_merge_mode;
		ops->reset_3d_mode = sde_hw_pp_reset_3d_merge_mode;
	}
};

static struct sde_hw_blk_ops sde_hw_ops = {
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