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Commit 1704a81c authored by Paul Mackerras's avatar Paul Mackerras
Browse files

KVM: PPC: Book3S HV: Use msgsnd for IPIs to other cores on POWER9 



On POWER9, the msgsnd instruction is able to send interrupts to
other cores, as well as other threads on the local core.  Since
msgsnd is generally simpler and faster than sending an IPI via the
XICS, we use msgsnd for all IPIs sent by KVM on POWER9.

Signed-off-by: default avatarPaul Mackerras <paulus@ozlabs.org>
parent 7c5b06ca

arch/powerpc/kvm/book3s_hv.c

+10 −1
Original line number Diff line number Diff line
@@ -147,12 +147,21 @@ static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, 


static bool kvmppc_ipi_thread(int cpu)

{

	unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);



	/* On POWER9 we can use msgsnd to IPI any cpu */

	if (cpu_has_feature(CPU_FTR_ARCH_300)) {

		msg |= get_hard_smp_processor_id(cpu);

		smp_mb();

		__asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));

		return true;

	}



	/* On POWER8 for IPIs to threads in the same core, use msgsnd */

	if (cpu_has_feature(CPU_FTR_ARCH_207S)) {

		preempt_disable();

		if (cpu_first_thread_sibling(cpu) ==

		    cpu_first_thread_sibling(smp_processor_id())) {

			unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);

			msg |= cpu_thread_in_core(cpu);

			smp_mb();

			__asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));

arch/powerpc/kvm/book3s_hv_builtin.c

+8 −2
Original line number Diff line number Diff line
@@ -206,12 +206,18 @@ static inline void rm_writeb(unsigned long paddr, u8 val) 
void kvmhv_rm_send_ipi(int cpu)

{

	unsigned long xics_phys;

	unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);



	/* On POWER8 for IPIs to threads in the same core, use msgsnd */

	/* On POWER9 we can use msgsnd for any destination cpu. */

	if (cpu_has_feature(CPU_FTR_ARCH_300)) {

		msg |= get_hard_smp_processor_id(cpu);

		__asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));

		return;

	}

	/* On POWER8 for IPIs to threads in the same core, use msgsnd. */

	if (cpu_has_feature(CPU_FTR_ARCH_207S) &&

	    cpu_first_thread_sibling(cpu) ==

	    cpu_first_thread_sibling(raw_smp_processor_id())) {

		unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);

		msg |= cpu_thread_in_core(cpu);

		__asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));

		return;