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Commit 15700039 authored by Alan Cox's avatar Alan Cox Committed by Greg Kroah-Hartman
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Staging: et131x: prune all the debug code



We don't need it, we have a perfectly good set of debug tools. For this pass
keep a few debug printks around which are "should not happen" items

Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent bc7f9c59
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+0 −1
Original line number Diff line number Diff line
@@ -10,7 +10,6 @@ et131x-objs := et1310_eeprom.o \
		et1310_pm.o \
		et1310_rx.o \
		et1310_tx.o \
		et131x_debug.o \
		et131x_initpci.o \
		et131x_isr.o \
		et131x_netdev.o
+0 −1
Original line number Diff line number Diff line
@@ -56,7 +56,6 @@
 */

#include "et131x_version.h"
#include "et131x_debug.h"
#include "et131x_defs.h"

#include <linux/pci.h>
+2 −62
Original line number Diff line number Diff line
@@ -56,7 +56,6 @@
 */

#include "et131x_version.h"
#include "et131x_debug.h"
#include "et131x_defs.h"

#include <linux/init.h>
@@ -75,6 +74,7 @@
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/bitops.h>
#include <linux/pci.h>
#include <asm/system.h>

#include <linux/netdevice.h>
@@ -92,11 +92,6 @@
#include "et131x_adapter.h"
#include "et131x_initpci.h"

/* Data for debugging facilities */
#ifdef CONFIG_ET131X_DEBUG
extern dbg_info_t *et131x_dbginfo;
#endif /* CONFIG_ET131X_DEBUG */

/**
 * ConfigMacRegs1 - Initialize the first part of MAC regs
 * @pAdpater: pointer to our adapter structure
@@ -110,8 +105,6 @@ void ConfigMACRegs1(struct et131x_adapter *etdev)
	MAC_HFDP_t hfdp;
	MII_MGMT_CFG_t mii_mgmt_cfg;

	DBG_ENTER(et131x_dbginfo);

	/* First we need to reset everything.  Write to MAC configuration
	 * register 1 to perform reset.
	 */
@@ -171,8 +164,6 @@ void ConfigMACRegs1(struct et131x_adapter *etdev)

	/* clear out MAC config reset */
	writel(0, &pMac->cfg1.value);

	DBG_LEAVE(et131x_dbginfo);
}

/**
@@ -188,8 +179,6 @@ void ConfigMACRegs2(struct et131x_adapter *etdev)
	MAC_IF_CTRL_t ifctrl;
	TXMAC_CTL_t ctl;

	DBG_ENTER(et131x_dbginfo);

	ctl.value = readl(&etdev->regs->txmac.ctl.value);
	cfg1.value = readl(&pMac->cfg1.value);
	cfg2.value = readl(&pMac->cfg2.value);
@@ -255,17 +244,11 @@ void ConfigMACRegs2(struct et131x_adapter *etdev)
								 delay < 100);

	if (delay == 100) {
		DBG_ERROR(et131x_dbginfo,
		dev_warn(&etdev->pdev->dev,
		    "Syncd bits did not respond correctly cfg1 word 0x%08x\n",
			cfg1.value);
	}

	DBG_TRACE(et131x_dbginfo,
		"Speed %d, Dup %d, CFG1 0x%08x, CFG2 0x%08x, if_ctrl 0x%08x\n",
		etdev->linkspeed, etdev->duplex_mode,
		readl(&pMac->cfg1.value), readl(&pMac->cfg2.value),
		readl(&pMac->if_ctrl.value));

	/* Enable TXMAC */
	ctl.bits.txmac_en = 0x1;
	ctl.bits.fc_disable = 0x1;
@@ -275,12 +258,7 @@ void ConfigMACRegs2(struct et131x_adapter *etdev)
	if (etdev->Flags & fMP_ADAPTER_LOWER_POWER) {
		et131x_rx_dma_enable(etdev);
		et131x_tx_dma_enable(etdev);
	} else {
		DBG_WARNING(et131x_dbginfo,
			    "Didn't enable Rx/Tx due to low-power mode\n");
	}

	DBG_LEAVE(et131x_dbginfo);
}

void ConfigRxMacRegs(struct et131x_adapter *etdev)
@@ -290,8 +268,6 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev)
	RXMAC_WOL_SA_HI_t sa_hi;
	RXMAC_PF_CTRL_t pf_ctrl = { 0 };

	DBG_ENTER(et131x_dbginfo);

	/* Disable the MAC while it is being configured (also disable WOL) */
	writel(0x8, &pRxMac->ctrl.value);

@@ -421,8 +397,6 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev)
	 */
	writel(pf_ctrl.value, &pRxMac->pf_ctrl.value);
	writel(0x9, &pRxMac->ctrl.value);

	DBG_LEAVE(et131x_dbginfo);
}

void ConfigTxMacRegs(struct et131x_adapter *etdev)
@@ -430,8 +404,6 @@ void ConfigTxMacRegs(struct et131x_adapter *etdev)
	struct _TXMAC_t __iomem *pTxMac = &etdev->regs->txmac;
	TXMAC_CF_PARAM_t Local;

	DBG_ENTER(et131x_dbginfo);

	/* We need to update the Control Frame Parameters
	 * cfpt - control frame pause timer set to 64 (0x40)
	 * cfep - control frame extended pause timer set to 0x0
@@ -443,8 +415,6 @@ void ConfigTxMacRegs(struct et131x_adapter *etdev)
		Local.bits.cfep = 0x0;
		writel(Local.value, &pTxMac->cf_param.value);
	}

	DBG_LEAVE(et131x_dbginfo);
}

void ConfigMacStatRegs(struct et131x_adapter *etdev)
@@ -452,8 +422,6 @@ void ConfigMacStatRegs(struct et131x_adapter *etdev)
	struct _MAC_STAT_t __iomem *pDevMacStat =
		&etdev->regs->macStat;

	DBG_ENTER(et131x_dbginfo);

	/* Next we need to initialize all the MAC_STAT registers to zero on
	 * the device.
	 */
@@ -534,8 +502,6 @@ void ConfigMacStatRegs(struct et131x_adapter *etdev)

		writel(Carry2M.value, &pDevMacStat->Carry2M.value);
	}

	DBG_LEAVE(et131x_dbginfo);
}

void ConfigFlowControl(struct et131x_adapter *etdev)
@@ -614,8 +580,6 @@ void HandleMacStatInterrupt(struct et131x_adapter *etdev)
	MAC_STAT_REG_1_t Carry1;
	MAC_STAT_REG_2_t Carry2;

	DBG_ENTER(et131x_dbginfo);

	/* Read the interrupt bits from the register(s).  These are Clear On
	 * Write.
	 */
@@ -659,8 +623,6 @@ void HandleMacStatInterrupt(struct et131x_adapter *etdev)
		etdev->Stats.late_collisions += COUNTER_WRAP_12_BIT;
	if (Carry2.bits.tncl)
		etdev->Stats.collisions += COUNTER_WRAP_12_BIT;

	DBG_LEAVE(et131x_dbginfo);
}

void SetupDeviceForMulticast(struct et131x_adapter *etdev)
@@ -674,30 +636,14 @@ void SetupDeviceForMulticast(struct et131x_adapter *etdev)
	uint32_t hash4 = 0;
	u32 pm_csr;

	DBG_ENTER(et131x_dbginfo);

	/* If ET131X_PACKET_TYPE_MULTICAST is specified, then we provision
	 * the multi-cast LIST.  If it is NOT specified, (and "ALL" is not
	 * specified) then we should pass NO multi-cast addresses to the
	 * driver.
	 */
	if (etdev->PacketFilter & ET131X_PACKET_TYPE_MULTICAST) {
		DBG_VERBOSE(et131x_dbginfo,
			    "MULTICAST flag is set, MCCount: %d\n",
			    etdev->MCAddressCount);

		/* Loop through our multicast array and set up the device */
		for (nIndex = 0; nIndex < etdev->MCAddressCount; nIndex++) {
			DBG_VERBOSE(et131x_dbginfo,
			    "MCList[%d]: %02x:%02x:%02x:%02x:%02x:%02x\n",
			    nIndex,
			    etdev->MCList[nIndex][0],
			    etdev->MCList[nIndex][1],
			    etdev->MCList[nIndex][2],
			    etdev->MCList[nIndex][3],
			    etdev->MCList[nIndex][4],
			    etdev->MCList[nIndex][5]);

			result = ether_crc(6, etdev->MCList[nIndex]);

			result = (result & 0x3F800000) >> 23;
@@ -725,8 +671,6 @@ void SetupDeviceForMulticast(struct et131x_adapter *etdev)
		writel(hash3, &rxmac->multi_hash3);
		writel(hash4, &rxmac->multi_hash4);
	}

	DBG_LEAVE(et131x_dbginfo);
}

void SetupDeviceForUnicast(struct et131x_adapter *etdev)
@@ -737,8 +681,6 @@ void SetupDeviceForUnicast(struct et131x_adapter *etdev)
	RXMAC_UNI_PF_ADDR3_t uni_pf3;
	u32 pm_csr;

	DBG_ENTER(et131x_dbginfo);

	/* Set up unicast packet filter reg 3 to be the first two octets of
	 * the MAC address for both address
	 *
@@ -769,6 +711,4 @@ void SetupDeviceForUnicast(struct et131x_adapter *etdev)
		writel(uni_pf2.value, &rxmac->uni_pf_addr2.value);
		writel(uni_pf3.value, &rxmac->uni_pf_addr3.value);
	}

	DBG_LEAVE(et131x_dbginfo);
}
+8 −80
Original line number Diff line number Diff line
@@ -56,7 +56,6 @@
 */

#include "et131x_version.h"
#include "et131x_debug.h"
#include "et131x_defs.h"

#include <linux/pci.h>
@@ -98,11 +97,6 @@
#include "et1310_rx.h"
#include "et1310_mac.h"

/* Data for debugging facilities */
#ifdef CONFIG_ET131X_DEBUG
extern dbg_info_t *et131x_dbginfo;
#endif /* CONFIG_ET131X_DEBUG */

/* Prototypes for functions with local scope */
static int et131x_xcvr_init(struct et131x_adapter *adapter);

@@ -157,9 +151,9 @@ int PhyMiRead(struct et131x_adapter *adapter, uint8_t xcvrAddr,

	/* If we hit the max delay, we could not read the register */
	if (delay >= 50) {
		DBG_WARNING(et131x_dbginfo,
		dev_warn(&adapter->pdev->dev,
			    "xcvrReg 0x%08x could not be read\n", xcvrReg);
		DBG_WARNING(et131x_dbginfo, "status is  0x%08x\n",
		dev_warn(&adapter->pdev->dev, "status is  0x%08x\n",
			    miiIndicator.value);

		status = -EIO;
@@ -179,10 +173,6 @@ int PhyMiRead(struct et131x_adapter *adapter, uint8_t xcvrAddr,
	/* Stop the read operation */
	writel(0, &mac->mii_mgmt_cmd.value);

	DBG_VERBOSE(et131x_dbginfo, "  xcvr_addr = 0x%02x, "
		    "xcvr_reg  = 0x%02x, "
		    "value     = 0x%04x.\n", xcvrAddr, xcvrReg, *value);

	/* set the registers we touched back to the state at which we entered
	 * this function
	 */
@@ -242,11 +232,11 @@ int MiWrite(struct et131x_adapter *adapter, uint8_t xcvrReg, uint16_t value)
	if (delay == 100) {
		uint16_t TempValue;

		DBG_WARNING(et131x_dbginfo,
		dev_warn(&adapter->pdev->dev,
		    "xcvrReg 0x%08x could not be written", xcvrReg);
		DBG_WARNING(et131x_dbginfo, "status is  0x%08x\n",
		dev_warn(&adapter->pdev->dev, "status is  0x%08x\n",
			    miiIndicator.value);
		DBG_WARNING(et131x_dbginfo, "command is  0x%08x\n",
		dev_warn(&adapter->pdev->dev, "command is  0x%08x\n",
			    readl(&mac->mii_mgmt_cmd.value));

		MiRead(adapter, xcvrReg, &TempValue);
@@ -263,10 +253,6 @@ int MiWrite(struct et131x_adapter *adapter, uint8_t xcvrReg, uint16_t value)
	writel(miiAddr.value, &mac->mii_mgmt_addr.value);
	writel(miiCmd.value, &mac->mii_mgmt_cmd.value);

	DBG_VERBOSE(et131x_dbginfo, " xcvr_addr = 0x%02x, "
		    "xcvr_reg  = 0x%02x, "
		    "value     = 0x%04x.\n", xcvrAddr, xcvrReg, value);

	return status;
}

@@ -284,8 +270,6 @@ int et131x_xcvr_find(struct et131x_adapter *adapter)
	MI_IDR2_t idr2;
	uint32_t xcvr_id;

	DBG_ENTER(et131x_dbginfo);

	/* We need to get xcvr id and address we just get the first one */
	for (xcvr_addr = 0; xcvr_addr < 32; xcvr_addr++) {
		/* Read the ID from the PHY */
@@ -299,10 +283,6 @@ int et131x_xcvr_find(struct et131x_adapter *adapter)
		xcvr_id = (uint32_t) ((idr1.value << 16) | idr2.value);

		if ((idr1.value != 0) && (idr1.value != 0xffff)) {
			DBG_TRACE(et131x_dbginfo,
				  "Xcvr addr: 0x%02x\tXcvr_id: 0x%08x\n",
				  xcvr_addr, xcvr_id);

			adapter->Stats.xcvr_id = xcvr_id;
			adapter->Stats.xcvr_addr = xcvr_addr;

@@ -310,8 +290,6 @@ int et131x_xcvr_find(struct et131x_adapter *adapter)
			break;
		}
	}

	DBG_LEAVE(et131x_dbginfo);
	return status;
}

@@ -327,13 +305,9 @@ int et131x_setphy_normal(struct et131x_adapter *adapter)
{
	int status;

	DBG_ENTER(et131x_dbginfo);

	/* Make sure the PHY is powered up */
	ET1310_PhyPowerDown(adapter, 0);
	status = et131x_xcvr_init(adapter);

	DBG_LEAVE(et131x_dbginfo);
	return status;
}

@@ -350,8 +324,6 @@ static int et131x_xcvr_init(struct et131x_adapter *adapter)
	MI_ISR_t isr;
	MI_LCR2_t lcr2;

	DBG_ENTER(et131x_dbginfo);

	/* Zero out the adapter structure variable representing BMSR */
	adapter->Bmsr.value = 0;

@@ -412,8 +384,6 @@ static int et131x_xcvr_init(struct et131x_adapter *adapter)

		/* NOTE - Do we need this? */
		ET1310_PhyAccessMiBit(adapter, TRUEPHY_BIT_SET, 0, 9, NULL);

		DBG_LEAVE(et131x_dbginfo);
		return status;
	} else {
		ET1310_PhyAutoNeg(adapter, false);
@@ -469,7 +439,6 @@ static int et131x_xcvr_init(struct et131x_adapter *adapter)
			break;
		}

		DBG_LEAVE(et131x_dbginfo);
		return status;
	}
}
@@ -486,8 +455,6 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
	uint32_t polarity;
	unsigned long flags;

	DBG_ENTER(et131x_dbginfo);

	if (bmsr_ints.bits.link_status) {
		if (bmsr.bits.link_status) {
			etdev->PoMgmt.TransPhyComaModeOnBoot = 20;
@@ -506,8 +473,8 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
			if (etdev->RegistryPhyLoopbk == false)
				netif_carrier_on(etdev->netdev);
		} else {
			DBG_WARNING(et131x_dbginfo,
				    "Link down cable problem\n");
			dev_warn(&etdev->pdev->dev,
			    "Link down - cable problem ?\n");

			if (etdev->linkspeed == TRUEPHY_SPEED_10MBPS) {
				/* NOTE - Is there a way to query this without
@@ -586,11 +553,6 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
			etdev->linkspeed = speed;
			etdev->duplex_mode = duplex;

			DBG_TRACE(et131x_dbginfo,
				"etdev->linkspeed 0x%04x, etdev->duplex_mode 0x%08x\n",
				etdev->linkspeed,
				etdev->duplex_mode);

			etdev->PoMgmt.TransPhyComaModeOnBoot = 20;

			if (etdev->linkspeed == TRUEPHY_SPEED_10MBPS) {
@@ -619,8 +581,6 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
			ConfigMACRegs2(etdev);
		}
	}

	DBG_LEAVE(et131x_dbginfo);
}

/**
@@ -631,8 +591,6 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
 */
void TPAL_SetPhy10HalfDuplex(struct et131x_adapter *etdev)
{
	DBG_ENTER(et131x_dbginfo);

	/* Power down PHY */
	ET1310_PhyPowerDown(etdev, 1);

@@ -646,8 +604,6 @@ void TPAL_SetPhy10HalfDuplex(struct et131x_adapter *etdev)

	/* Power up PHY */
	ET1310_PhyPowerDown(etdev, 0);

	DBG_LEAVE(et131x_dbginfo);
}

/**
@@ -658,8 +614,6 @@ void TPAL_SetPhy10HalfDuplex(struct et131x_adapter *etdev)
 */
void TPAL_SetPhy10FullDuplex(struct et131x_adapter *etdev)
{
	DBG_ENTER(et131x_dbginfo);

	/* Power down PHY */
	ET1310_PhyPowerDown(etdev, 1);

@@ -673,8 +627,6 @@ void TPAL_SetPhy10FullDuplex(struct et131x_adapter *etdev)

	/* Power up PHY */
	ET1310_PhyPowerDown(etdev, 0);

	DBG_LEAVE(et131x_dbginfo);
}

/**
@@ -683,8 +635,6 @@ void TPAL_SetPhy10FullDuplex(struct et131x_adapter *etdev)
 */
void TPAL_SetPhy10Force(struct et131x_adapter *etdev)
{
	DBG_ENTER(et131x_dbginfo);

	/* Power down PHY */
	ET1310_PhyPowerDown(etdev, 1);

@@ -704,8 +654,6 @@ void TPAL_SetPhy10Force(struct et131x_adapter *etdev)

	/* Power up PHY */
	ET1310_PhyPowerDown(etdev, 0);

	DBG_LEAVE(et131x_dbginfo);
}

/**
@@ -716,8 +664,6 @@ void TPAL_SetPhy10Force(struct et131x_adapter *etdev)
 */
void TPAL_SetPhy100HalfDuplex(struct et131x_adapter *etdev)
{
	DBG_ENTER(et131x_dbginfo);

	/* Power down PHY */
	ET1310_PhyPowerDown(etdev, 1);

@@ -734,8 +680,6 @@ void TPAL_SetPhy100HalfDuplex(struct et131x_adapter *etdev)

	/* Power up PHY */
	ET1310_PhyPowerDown(etdev, 0);

	DBG_LEAVE(et131x_dbginfo);
}

/**
@@ -746,8 +690,6 @@ void TPAL_SetPhy100HalfDuplex(struct et131x_adapter *etdev)
 */
void TPAL_SetPhy100FullDuplex(struct et131x_adapter *etdev)
{
	DBG_ENTER(et131x_dbginfo);

	/* Power down PHY */
	ET1310_PhyPowerDown(etdev, 1);

@@ -761,8 +703,6 @@ void TPAL_SetPhy100FullDuplex(struct et131x_adapter *etdev)

	/* Power up PHY */
	ET1310_PhyPowerDown(etdev, 0);

	DBG_LEAVE(et131x_dbginfo);
}

/**
@@ -771,8 +711,6 @@ void TPAL_SetPhy100FullDuplex(struct et131x_adapter *etdev)
 */
void TPAL_SetPhy100Force(struct et131x_adapter *etdev)
{
	DBG_ENTER(et131x_dbginfo);

	/* Power down PHY */
	ET1310_PhyPowerDown(etdev, 1);

@@ -792,8 +730,6 @@ void TPAL_SetPhy100Force(struct et131x_adapter *etdev)

	/* Power up PHY */
	ET1310_PhyPowerDown(etdev, 0);

	DBG_LEAVE(et131x_dbginfo);
}

/**
@@ -804,8 +740,6 @@ void TPAL_SetPhy100Force(struct et131x_adapter *etdev)
 */
void TPAL_SetPhy1000FullDuplex(struct et131x_adapter *etdev)
{
	DBG_ENTER(et131x_dbginfo);

	/* Power down PHY */
	ET1310_PhyPowerDown(etdev, 1);

@@ -819,8 +753,6 @@ void TPAL_SetPhy1000FullDuplex(struct et131x_adapter *etdev)

	/* power up PHY */
	ET1310_PhyPowerDown(etdev, 0);

	DBG_LEAVE(et131x_dbginfo);
}

/**
@@ -829,8 +761,6 @@ void TPAL_SetPhy1000FullDuplex(struct et131x_adapter *etdev)
 */
void TPAL_SetPhyAutoNeg(struct et131x_adapter *etdev)
{
	DBG_ENTER(et131x_dbginfo);

	/* Power down PHY */
	ET1310_PhyPowerDown(etdev, 1);

@@ -849,8 +779,6 @@ void TPAL_SetPhyAutoNeg(struct et131x_adapter *etdev)

	/* Power up PHY */
	ET1310_PhyPowerDown(etdev, 0);

	DBG_LEAVE(et131x_dbginfo);
}


+0 −14
Original line number Diff line number Diff line
@@ -56,7 +56,6 @@
 */

#include "et131x_version.h"
#include "et131x_debug.h"
#include "et131x_defs.h"

#include <linux/init.h>
@@ -92,11 +91,6 @@
#include "et131x_adapter.h"
#include "et131x_initpci.h"

/* Data for debugging facilities */
#ifdef CONFIG_ET131X_DEBUG
extern dbg_info_t *et131x_dbginfo;
#endif /* CONFIG_ET131X_DEBUG */

/**
 * EnablePhyComa - called when network cable is unplugged
 * @etdev: pointer to our adapter structure
@@ -122,8 +116,6 @@ void EnablePhyComa(struct et131x_adapter *etdev)
	unsigned long flags;
	u32 GlobalPmCSR;

	DBG_ENTER(et131x_dbginfo);

	GlobalPmCSR = readl(&etdev->regs->global.pm_csr);

	/* Save the GbE PHY speed and duplex modes. Need to restore this
@@ -146,8 +138,6 @@ void EnablePhyComa(struct et131x_adapter *etdev)
	/* Program gigE PHY in to Coma mode */
	GlobalPmCSR |= ET_PM_PHY_SW_COMA;
	writel(GlobalPmCSR, &etdev->regs->global.pm_csr);

	DBG_LEAVE(et131x_dbginfo);
}

/**
@@ -158,8 +148,6 @@ void DisablePhyComa(struct et131x_adapter *etdev)
{
	u32 GlobalPmCSR;

	DBG_ENTER(et131x_dbginfo);

	GlobalPmCSR = readl(&etdev->regs->global.pm_csr);

	/* Disable phy_sw_coma register and re-enable JAGCore clocks */
@@ -193,7 +181,5 @@ void DisablePhyComa(struct et131x_adapter *etdev)

	/* Need to re-enable Rx. */
	et131x_rx_dma_enable(etdev);

	DBG_LEAVE(et131x_dbginfo);
}
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