Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 13e7a8e8 authored by Haren Myneni's avatar Haren Myneni Committed by Benjamin Herrenschmidt
Browse files

powerpc: Macros for saving/restore PPR 



[PATCH 5/6] powerpc: Macros for saving/restore PPR

Several macros are defined for saving and restore user defined PPR value.

Signed-off-by: default avatarHaren Myneni <haren@us.ibm.com>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 92779245

arch/powerpc/include/asm/exception-64s.h

+37 −0
Original line number Diff line number Diff line
@@ -108,6 +108,43 @@ 
#define RESTORE_LR(reg, area)

#endif



/*

 * PPR save/restore macros used in exceptions_64s.S  

 * Used for P7 or later processors

 */

#define SAVE_PPR(area, ra, rb)						\

BEGIN_FTR_SECTION_NESTED(940)						\

	ld	ra,PACACURRENT(r13);					\

	ld	rb,area+EX_PPR(r13);	/* Read PPR from paca */	\

	std	rb,TASKTHREADPPR(ra);					\

END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)



#define RESTORE_PPR_PACA(area, ra)					\

BEGIN_FTR_SECTION_NESTED(941)						\

	ld	ra,area+EX_PPR(r13);					\

	mtspr	SPRN_PPR,ra;						\

END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)



/*

 * Increase the priority on systems where PPR save/restore is not

 * implemented/ supported.

 */

#define HMT_MEDIUM_PPR_DISCARD						\

BEGIN_FTR_SECTION_NESTED(942)						\

	HMT_MEDIUM;							\

END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,0,942)  /*non P7*/		



/*

 * Save PPR in paca whenever some register is available to use.

 * Then increase the priority.

 */

#define HMT_MEDIUM_PPR_SAVE(area, ra)					\

BEGIN_FTR_SECTION_NESTED(943)						\

	mfspr	ra,SPRN_PPR;						\

	std	ra,area+EX_PPR(r13);					\

	HMT_MEDIUM;							\

END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,943) 



#define __EXCEPTION_PROLOG_1(area, extra, vec)				\

	GET_PACA(r13);							\

	std	r9,area+EX_R9(r13);	/* save r9 - r12 */		\

arch/powerpc/include/asm/ppc_asm.h

+25 −0
Original line number Diff line number Diff line
@@ -389,6 +389,31 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601) 
	FTR_SECTION_ELSE_NESTED(848);	\

	mtocrf (FXM), RS;		\

	ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_NOEXECUTE, 848)



/*

 * PPR restore macros used in entry_64.S

 * Used for P7 or later processors

 */

#define HMT_MEDIUM_LOW_HAS_PPR						\

BEGIN_FTR_SECTION_NESTED(944)						\

	HMT_MEDIUM_LOW;							\

END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,944)



#define SET_DEFAULT_THREAD_PPR(ra, rb)					\

BEGIN_FTR_SECTION_NESTED(945)						\

	lis	ra,INIT_PPR@highest;	/* default ppr=3 */		\

	ld	rb,PACACURRENT(r13);					\

	sldi	ra,ra,32;	/* 11- 13 bits are used for ppr */	\

	std	ra,TASKTHREADPPR(rb);					\

END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,945)



#define RESTORE_PPR(ra, rb)						\

BEGIN_FTR_SECTION_NESTED(946)						\

	ld	ra,PACACURRENT(r13);					\

	ld	rb,TASKTHREADPPR(ra);					\

	mtspr	SPRN_PPR,rb;	/* Restore PPR */			\

END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,946)



#endif



/*

arch/powerpc/include/asm/reg.h

+1 −0
Original line number Diff line number Diff line
@@ -289,6 +289,7 @@ 
#define SPRN_DBAT6U	0x23C	/* Data BAT 6 Upper Register */

#define SPRN_DBAT7L	0x23F	/* Data BAT 7 Lower Register */

#define SPRN_DBAT7U	0x23E	/* Data BAT 7 Upper Register */

#define SPRN_PPR	0x380	/* SMT Thread status Register */



#define SPRN_DEC	0x016		/* Decrement Register */

#define SPRN_DER	0x095		/* Debug Enable Regsiter */