Merge "msm: kgsl: Remove the preemption oob" (13c6efe5) · Commits · e / devices / android_kernel_oneplus_sm8150

drivers/gpu/msm/adreno_a6xx_preempt.c

+27 −33

Original line number	Diff line number	Diff line
		@@ -34,44 +34,35 @@ enum {
		static void _update_wptr(struct adreno_device *adreno_dev, bool reset_timer)
		{
		struct adreno_ringbuffer *rb = adreno_dev->cur_rb;
		unsigned int wptr;
		unsigned long flags;
		struct gmu_dev_ops *gmu_dev_ops = GMU_DEVICE_OPS(
		KGSL_DEVICE(adreno_dev));
		int ret = 0;

		spin_lock_irqsave(&rb->preempt_lock, flags);

		if (in_interrupt() == 0) {
		/*
		* Need to make sure GPU is up before we read the
		* WPTR as fence doesn't wake GPU on read operation.
		* We might have skipped updating the wptr in case we are in
		* dispatcher context. Do it now.
		*/
		if (in_interrupt() == 0) {
		int status;

		if (GMU_DEV_OP_VALID(gmu_dev_ops, oob_set)) {
		status = gmu_dev_ops->oob_set(adreno_dev, oob_preempt);
		if (status) {
		adreno_set_gpu_fault(adreno_dev,
		ADRENO_GMU_FAULT);
		adreno_dispatcher_schedule(
		KGSL_DEVICE(adreno_dev));
		return;
		}
		}
		}
		if (rb->skip_inline_wptr) {

		ret = adreno_gmu_fenced_write(adreno_dev,
		ADRENO_REG_CP_RB_WPTR, rb->wptr,
		FENCE_STATUS_WRITEDROPPED0_MASK);

		spin_lock_irqsave(&rb->preempt_lock, flags);
		reset_timer = true;
		rb->skip_inline_wptr = false;
		}
		} else {
		unsigned int wptr;

		adreno_readreg(adreno_dev, ADRENO_REG_CP_RB_WPTR, &wptr);

		if (wptr != rb->wptr) {
		adreno_writereg(adreno_dev, ADRENO_REG_CP_RB_WPTR,
		rb->wptr);
		/*
		* In case something got submitted while preemption was on
		* going, reset the timer.
		*/
		reset_timer = true;
		}
		}

		if (reset_timer)
		rb->dispatch_q.expires = jiffies +
		@@ -80,8 +71,11 @@ static void _update_wptr(struct adreno_device *adreno_dev, bool reset_timer)
		spin_unlock_irqrestore(&rb->preempt_lock, flags);

		if (in_interrupt() == 0) {
		if (GMU_DEV_OP_VALID(gmu_dev_ops, oob_clear))
		gmu_dev_ops->oob_clear(adreno_dev, oob_preempt);
		/* If WPTR update fails, set the fault and trigger recovery */
		if (ret) {
		adreno_set_gpu_fault(adreno_dev, ADRENO_GMU_FAULT);
		adreno_dispatcher_schedule(KGSL_DEVICE(adreno_dev));
		}
		}
		}

drivers/gpu/msm/adreno_ringbuffer.c

+9 −2

Original line number	Diff line number	Diff line
		@@ -109,8 +109,16 @@ static void adreno_ringbuffer_wptr(struct adreno_device *adreno_dev,
		ret = adreno_gmu_fenced_write(adreno_dev,
		ADRENO_REG_CP_RB_WPTR, rb->_wptr,
		FENCE_STATUS_WRITEDROPPED0_MASK);

		rb->skip_inline_wptr = false;
		}
		} else {
		/*
		* We skipped inline submission because of preemption state
		* machine. Set things up so that we write the wptr to the
		* hardware eventually.
		*/
		if (adreno_dev->cur_rb == rb)
		rb->skip_inline_wptr = true;
		}

		rb->wptr = rb->_wptr;
		@@ -121,7 +129,6 @@ static void adreno_ringbuffer_wptr(struct adreno_device *adreno_dev,
		adreno_set_gpu_fault(adreno_dev, ADRENO_GMU_FAULT);
		adreno_dispatcher_schedule(KGSL_DEVICE(adreno_dev));
		}

		}

		static void adreno_profile_submit_time(struct adreno_submit_time *time)

drivers/gpu/msm/adreno_ringbuffer.h

+3 −0

Original line number	Diff line number	Diff line
		@@ -108,6 +108,8 @@ struct adreno_ringbuffer_pagetable_info {
		* @gpr11: The gpr11 value of this RB
		* @preempted_midway: Indicates that the RB was preempted before rptr = wptr
		* @preempt_lock: Lock to protect the wptr pointer while it is being updated
		* @skip_inline_wptr: Used during preemption to make sure wptr is updated in
		* hardware
		*/
		struct adreno_ringbuffer {
		uint32_t flags;
		@@ -130,6 +132,7 @@ struct adreno_ringbuffer {
		unsigned int gpr11;
		int preempted_midway;
		spinlock_t preempt_lock;
		bool skip_inline_wptr;
		};

		/* Returns the current ringbuffer */

drivers/gpu/msm/kgsl_gmu_core.c

+0 −1

Original line number	Diff line number	Diff line
		@@ -45,7 +45,6 @@ const char *gmu_core_oob_type_str(enum oob_request req)
		struct oob_entry table[] = {
		{ oob_gpu, "oob_gpu"},
		{ oob_perfcntr, "oob_perfcntr"},
		{ oob_preempt, "oob_preempt"},
		{ oob_boot_slumber, "oob_boot_slumber"},
		{ oob_dcvs, "oob_dcvs"},
		};

drivers/gpu/msm/kgsl_gmu_core.h

+0 −1

Original line number	Diff line number	Diff line
		@@ -76,7 +76,6 @@ enum gmu_coretype {
		enum oob_request {
		oob_gpu = 0,
		oob_perfcntr = 1,
		oob_preempt = 2,
		oob_boot_slumber = 6, /* reserved special case */
		oob_dcvs = 7, /* reserved special case */
		};