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Commit 139f37f5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin:
  Blackfin: debug-mmrs: include RSI_PID[4567] MMRs
  Blackfin: bf51x: fix up RSI_PID# MMR defines
  Blackfin: bf52x/bf54x: fix up usb MMR defines
  Blackfin: debug-mmrs: fix typos with gptimers/mdma/ppi
  Blackfin: gptimers: add structure for hardware register layout
  Blackfin: wire up new sendmmsg syscall
  Blackfin: mach/bfin_serial_5xx.h: punt now-unused header
  Blackfin: bfin_serial.h: turn default port wrappers into stubs
parents 5be7ef00 c320afe9
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+3 −3
Original line number Diff line number Diff line
@@ -184,7 +184,7 @@ struct bfin_uart_regs {
#undef __BFP

#ifndef port_membase
# define port_membase(p) (((struct bfin_serial_port *)(p))->port.membase)
# define port_membase(p) 0
#endif

#define UART_GET_CHAR(p)      bfin_read16(port_membase(p) + OFFSET_RBR)
@@ -235,10 +235,10 @@ struct bfin_uart_regs {
#define UART_SET_DLAB(p)      do { UART_PUT_LCR(p, UART_GET_LCR(p) | DLAB); SSYNC(); } while (0)

#ifndef put_lsr_cache
# define put_lsr_cache(p, v) (((struct bfin_serial_port *)(p))->lsr = (v))
# define put_lsr_cache(p, v)
#endif
#ifndef get_lsr_cache
# define get_lsr_cache(p)    (((struct bfin_serial_port *)(p))->lsr)
# define get_lsr_cache(p) 0
#endif

/* The hardware clears the LSR bits upon read, so we need to cache
+18 −0
Original line number Diff line number Diff line
@@ -193,4 +193,22 @@ uint16_t get_enabled_gptimers(void);
uint32_t get_gptimer_status(unsigned int group);
void     set_gptimer_status(unsigned int group, uint32_t value);

/*
 * All Blackfin system MMRs are padded to 32bits even if the register
 * itself is only 16bits.  So use a helper macro to streamline this.
 */
#define __BFP(m) u16 m; u16 __pad_##m

/*
 * bfin timer registers layout
 */
struct bfin_gptimer_regs {
	__BFP(config);
	u32 counter;
	u32 period;
	u32 width;
};

#undef __BFP

#endif
+2 −1
Original line number Diff line number Diff line
@@ -398,8 +398,9 @@
#define __NR_clock_adjtime	377
#define __NR_syncfs		378
#define __NR_setns		379
#define __NR_sendmmsg		380

#define __NR_syscall		380
#define __NR_syscall		381
#define NR_syscalls		__NR_syscall

/* Old optional stuff no one actually uses */
+18 −18
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@

#include <asm/blackfin.h>
#include <asm/gpio.h>
#include <asm/gptimers.h>
#include <asm/bfin_can.h>
#include <asm/bfin_dma.h>
#include <asm/bfin_ppi.h>
@@ -230,8 +231,8 @@ bfin_debug_mmrs_dma(struct dentry *parent, unsigned long base, int num, char mdm
#define DMA(num)  _DMA(num, DMA##num##_NEXT_DESC_PTR, 0, "")
#define _MDMA(num, x) \
	do { \
		_DMA(num, x##DMA_D##num##_CONFIG, 'D', #x); \
		_DMA(num, x##DMA_S##num##_CONFIG, 'S', #x); \
		_DMA(num, x##DMA_D##num##_NEXT_DESC_PTR, 'D', #x); \
		_DMA(num, x##DMA_S##num##_NEXT_DESC_PTR, 'S', #x); \
	} while (0)
#define MDMA(num) _MDMA(num, M)
#define IMDMA(num) _MDMA(num, IM)
@@ -264,20 +265,15 @@ bfin_debug_mmrs_eppi(struct dentry *parent, unsigned long base, int num)
/*
 * General Purpose Timers
 */
#define GPTIMER_OFF(mmr) (TIMER0_##mmr - TIMER0_CONFIG)
#define __GPTIMER(name) \
	do { \
		strcpy(_buf, #name); \
		debugfs_create_x16(buf, S_IRUSR|S_IWUSR, parent, (u16 *)(base + GPTIMER_OFF(name))); \
	} while (0)
#define __GPTIMER(uname, lname) __REGS(gptimer, #uname, lname)
static void __init __maybe_unused
bfin_debug_mmrs_gptimer(struct dentry *parent, unsigned long base, int num)
{
	char buf[32], *_buf = REGS_STR_PFX(buf, TIMER, num);
	__GPTIMER(CONFIG);
	__GPTIMER(COUNTER);
	__GPTIMER(PERIOD);
	__GPTIMER(WIDTH);
	__GPTIMER(CONFIG, config);
	__GPTIMER(COUNTER, counter);
	__GPTIMER(PERIOD, period);
	__GPTIMER(WIDTH, width);
}
#define GPTIMER(num) bfin_debug_mmrs_gptimer(parent, TIMER##num##_CONFIG, num)

@@ -355,7 +351,7 @@ bfin_debug_mmrs_ppi(struct dentry *parent, unsigned long base, int num)
	__PPI(DELAY, delay);
	__PPI(FRAME, frame);
}
#define PPI(num) bfin_debug_mmrs_ppi(parent, PPI##num##_STATUS, num)
#define PPI(num) bfin_debug_mmrs_ppi(parent, PPI##num##_CONTROL, num)

/*
 * SPI
@@ -1288,15 +1284,15 @@ static int __init bfin_debug_mmrs_init(void)
	D16(VR_CTL);
	D32(CHIPID);	/* it's part of this hardware block */

#if defined(PPI_STATUS) || defined(PPI0_STATUS) || defined(PPI1_STATUS)
#if defined(PPI_CONTROL) || defined(PPI0_CONTROL) || defined(PPI1_CONTROL)
	parent = debugfs_create_dir("ppi", top);
# ifdef PPI_STATUS
	bfin_debug_mmrs_ppi(parent, PPI_STATUS, -1);
# ifdef PPI_CONTROL
	bfin_debug_mmrs_ppi(parent, PPI_CONTROL, -1);
# endif
# ifdef PPI0_STATUS
# ifdef PPI0_CONTROL
	PPI(0);
# endif
# ifdef PPI1_STATUS
# ifdef PPI1_CONTROL
	PPI(1);
# endif
#endif
@@ -1341,6 +1337,10 @@ static int __init bfin_debug_mmrs_init(void)
	D16(RSI_PID1);
	D16(RSI_PID2);
	D16(RSI_PID3);
	D16(RSI_PID4);
	D16(RSI_PID5);
	D16(RSI_PID6);
	D16(RSI_PID7);
	D16(RSI_PWR_CONTROL);
	D16(RSI_RD_WAIT_EN);
	D32(RSI_RESPONSE0);
+0 −79
Original line number Diff line number Diff line
/*
 * Copyright 2008-2009 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later
 */

#include <asm/dma.h>
#include <asm/portmux.h>

#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
# define CONFIG_SERIAL_BFIN_CTSRTS

# ifndef CONFIG_UART0_CTS_PIN
#  define CONFIG_UART0_CTS_PIN -1
# endif

# ifndef CONFIG_UART0_RTS_PIN
#  define CONFIG_UART0_RTS_PIN -1
# endif

# ifndef CONFIG_UART1_CTS_PIN
#  define CONFIG_UART1_CTS_PIN -1
# endif

# ifndef CONFIG_UART1_RTS_PIN
#  define CONFIG_UART1_RTS_PIN -1
# endif
#endif

struct bfin_serial_res {
	unsigned long uart_base_addr;
	int uart_irq;
	int uart_status_irq;
#ifdef CONFIG_SERIAL_BFIN_DMA
	unsigned int uart_tx_dma_channel;
	unsigned int uart_rx_dma_channel;
#endif
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
	int uart_cts_pin;
	int uart_rts_pin;
#endif
};

struct bfin_serial_res bfin_serial_resource[] = {
#ifdef CONFIG_SERIAL_BFIN_UART0
	{
	 0xFFC00400,
	 IRQ_UART0_RX,
	 IRQ_UART0_ERROR,
#ifdef CONFIG_SERIAL_BFIN_DMA
	 CH_UART0_TX,
	 CH_UART0_RX,
#endif
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
	 CONFIG_UART0_CTS_PIN,
	 CONFIG_UART0_RTS_PIN,
#endif
	 },
#endif
#ifdef CONFIG_SERIAL_BFIN_UART1
	{
	 0xFFC02000,
	 IRQ_UART1_RX,
	 IRQ_UART1_ERROR,
#ifdef CONFIG_SERIAL_BFIN_DMA
	 CH_UART1_TX,
	 CH_UART1_RX,
#endif
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
	 CONFIG_UART1_CTS_PIN,
	 CONFIG_UART1_RTS_PIN,
#endif
	 },
#endif
};

#define DRIVER_NAME "bfin-uart"

#include <asm/bfin_serial.h>
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