Loading Documentation/devicetree/bindings/dma/brcm,iproc-sba.txt 0 → 100644 +29 −0 Original line number Original line Diff line number Diff line * Broadcom SBA RAID engine Required properties: - compatible: Should be one of the following "brcm,iproc-sba" "brcm,iproc-sba-v2" The "brcm,iproc-sba" has support for only 6 PQ coefficients The "brcm,iproc-sba-v2" has support for only 30 PQ coefficients - mboxes: List of phandle and mailbox channel specifiers Example: raid_mbox: mbox@67400000 { ... #mbox-cells = <3>; ... }; raid0 { compatible = "brcm,iproc-sba-v2"; mboxes = <&raid_mbox 0 0x1 0xffff>, <&raid_mbox 1 0x1 0xffff>, <&raid_mbox 2 0x1 0xffff>, <&raid_mbox 3 0x1 0xffff>, <&raid_mbox 4 0x1 0xffff>, <&raid_mbox 5 0x1 0xffff>, <&raid_mbox 6 0x1 0xffff>, <&raid_mbox 7 0x1 0xffff>; }; crypto/async_tx/async_pq.c +2 −3 Original line number Original line Diff line number Diff line Loading @@ -62,9 +62,6 @@ do_async_gen_syndrome(struct dma_chan *chan, dma_addr_t dma_dest[2]; dma_addr_t dma_dest[2]; int src_off = 0; int src_off = 0; if (submit->flags & ASYNC_TX_FENCE) dma_flags |= DMA_PREP_FENCE; while (src_cnt > 0) { while (src_cnt > 0) { submit->flags = flags_orig; submit->flags = flags_orig; pq_src_cnt = min(src_cnt, dma_maxpq(dma, dma_flags)); pq_src_cnt = min(src_cnt, dma_maxpq(dma, dma_flags)); Loading @@ -83,6 +80,8 @@ do_async_gen_syndrome(struct dma_chan *chan, if (cb_fn_orig) if (cb_fn_orig) dma_flags |= DMA_PREP_INTERRUPT; dma_flags |= DMA_PREP_INTERRUPT; } } if (submit->flags & ASYNC_TX_FENCE) dma_flags |= DMA_PREP_FENCE; /* Drivers force forward progress in case they can not provide /* Drivers force forward progress in case they can not provide * a descriptor * a descriptor Loading drivers/dma/Kconfig +15 −0 Original line number Original line Diff line number Diff line Loading @@ -99,6 +99,21 @@ config AXI_DMAC controller is often used in Analog Device's reference designs for FPGA controller is often used in Analog Device's reference designs for FPGA platforms. platforms. config BCM_SBA_RAID tristate "Broadcom SBA RAID engine support" depends on ARM64 || COMPILE_TEST depends on MAILBOX && RAID6_PQ select DMA_ENGINE select DMA_ENGINE_RAID select ASYNC_TX_DISABLE_XOR_VAL_DMA select ASYNC_TX_DISABLE_PQ_VAL_DMA default ARCH_BCM_IPROC help Enable support for Broadcom SBA RAID Engine. The SBA RAID engine is available on most of the Broadcom iProc SoCs. It has the capability to offload memcpy, xor and pq computation for raid5/6. config COH901318 config COH901318 bool "ST-Ericsson COH901318 DMA support" bool "ST-Ericsson COH901318 DMA support" select DMA_ENGINE select DMA_ENGINE Loading drivers/dma/Makefile +1 −0 Original line number Original line Diff line number Diff line Loading @@ -17,6 +17,7 @@ obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += ppc4xx/ obj-$(CONFIG_AT_HDMAC) += at_hdmac.o obj-$(CONFIG_AT_HDMAC) += at_hdmac.o obj-$(CONFIG_AT_XDMAC) += at_xdmac.o obj-$(CONFIG_AT_XDMAC) += at_xdmac.o obj-$(CONFIG_AXI_DMAC) += dma-axi-dmac.o obj-$(CONFIG_AXI_DMAC) += dma-axi-dmac.o obj-$(CONFIG_BCM_SBA_RAID) += bcm-sba-raid.o obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o Loading Loading
Documentation/devicetree/bindings/dma/brcm,iproc-sba.txt 0 → 100644 +29 −0 Original line number Original line Diff line number Diff line * Broadcom SBA RAID engine Required properties: - compatible: Should be one of the following "brcm,iproc-sba" "brcm,iproc-sba-v2" The "brcm,iproc-sba" has support for only 6 PQ coefficients The "brcm,iproc-sba-v2" has support for only 30 PQ coefficients - mboxes: List of phandle and mailbox channel specifiers Example: raid_mbox: mbox@67400000 { ... #mbox-cells = <3>; ... }; raid0 { compatible = "brcm,iproc-sba-v2"; mboxes = <&raid_mbox 0 0x1 0xffff>, <&raid_mbox 1 0x1 0xffff>, <&raid_mbox 2 0x1 0xffff>, <&raid_mbox 3 0x1 0xffff>, <&raid_mbox 4 0x1 0xffff>, <&raid_mbox 5 0x1 0xffff>, <&raid_mbox 6 0x1 0xffff>, <&raid_mbox 7 0x1 0xffff>; };
crypto/async_tx/async_pq.c +2 −3 Original line number Original line Diff line number Diff line Loading @@ -62,9 +62,6 @@ do_async_gen_syndrome(struct dma_chan *chan, dma_addr_t dma_dest[2]; dma_addr_t dma_dest[2]; int src_off = 0; int src_off = 0; if (submit->flags & ASYNC_TX_FENCE) dma_flags |= DMA_PREP_FENCE; while (src_cnt > 0) { while (src_cnt > 0) { submit->flags = flags_orig; submit->flags = flags_orig; pq_src_cnt = min(src_cnt, dma_maxpq(dma, dma_flags)); pq_src_cnt = min(src_cnt, dma_maxpq(dma, dma_flags)); Loading @@ -83,6 +80,8 @@ do_async_gen_syndrome(struct dma_chan *chan, if (cb_fn_orig) if (cb_fn_orig) dma_flags |= DMA_PREP_INTERRUPT; dma_flags |= DMA_PREP_INTERRUPT; } } if (submit->flags & ASYNC_TX_FENCE) dma_flags |= DMA_PREP_FENCE; /* Drivers force forward progress in case they can not provide /* Drivers force forward progress in case they can not provide * a descriptor * a descriptor Loading
drivers/dma/Kconfig +15 −0 Original line number Original line Diff line number Diff line Loading @@ -99,6 +99,21 @@ config AXI_DMAC controller is often used in Analog Device's reference designs for FPGA controller is often used in Analog Device's reference designs for FPGA platforms. platforms. config BCM_SBA_RAID tristate "Broadcom SBA RAID engine support" depends on ARM64 || COMPILE_TEST depends on MAILBOX && RAID6_PQ select DMA_ENGINE select DMA_ENGINE_RAID select ASYNC_TX_DISABLE_XOR_VAL_DMA select ASYNC_TX_DISABLE_PQ_VAL_DMA default ARCH_BCM_IPROC help Enable support for Broadcom SBA RAID Engine. The SBA RAID engine is available on most of the Broadcom iProc SoCs. It has the capability to offload memcpy, xor and pq computation for raid5/6. config COH901318 config COH901318 bool "ST-Ericsson COH901318 DMA support" bool "ST-Ericsson COH901318 DMA support" select DMA_ENGINE select DMA_ENGINE Loading
drivers/dma/Makefile +1 −0 Original line number Original line Diff line number Diff line Loading @@ -17,6 +17,7 @@ obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += ppc4xx/ obj-$(CONFIG_AT_HDMAC) += at_hdmac.o obj-$(CONFIG_AT_HDMAC) += at_hdmac.o obj-$(CONFIG_AT_XDMAC) += at_xdmac.o obj-$(CONFIG_AT_XDMAC) += at_xdmac.o obj-$(CONFIG_AXI_DMAC) += dma-axi-dmac.o obj-$(CONFIG_AXI_DMAC) += dma-axi-dmac.o obj-$(CONFIG_BCM_SBA_RAID) += bcm-sba-raid.o obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o Loading