Loading arch/arm64/boot/dts/qcom/qcs405.dtsi +6 −2 Original line number Diff line number Diff line Loading @@ -143,8 +143,12 @@ }; clock_gcc: qcom,gcc { compatible = "qcom,dummycc"; clock-output-names = "gcc_clocks"; compatible = "qcom,gcc-qcs405", "syscon"; reg = <0x1800000 0x80000>; reg-names = "cc_base"; vdd_cx-supply = <&pmd9655_s1_level>; clocks = <&clock_rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "cxo"; #clock-cells = <1>; #reset-cells = <1>; }; Loading Loading
arch/arm64/boot/dts/qcom/qcs405.dtsi +6 −2 Original line number Diff line number Diff line Loading @@ -143,8 +143,12 @@ }; clock_gcc: qcom,gcc { compatible = "qcom,dummycc"; clock-output-names = "gcc_clocks"; compatible = "qcom,gcc-qcs405", "syscon"; reg = <0x1800000 0x80000>; reg-names = "cc_base"; vdd_cx-supply = <&pmd9655_s1_level>; clocks = <&clock_rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "cxo"; #clock-cells = <1>; #reset-cells = <1>; }; Loading