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Commit 1284c248 authored by Kishon Vijay Abraham I's avatar Kishon Vijay Abraham I Committed by Ulf Hansson
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mmc: sdhci: Add quirk to indicate MMC_RSP_136 has CRC 



TI's implementation of sdhci controller used in DRA7 SoC's has
CRC in responses with length 136 bits. Add quirk to indicate
the controller has CRC in MMC_RSP_136. If this quirk is
set sdhci library shouldn't shift the response present in
SDHCI_RESPONSE register.

Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 4a5fc119

drivers/mmc/host/sdhci.c

+3 −0
Original line number Diff line number Diff line
@@ -1182,6 +1182,9 @@ static void sdhci_read_rsp_136(struct sdhci_host *host, struct mmc_command *cmd) 
		cmd->resp[i] = sdhci_readl(host, reg);

	}



	if (host->quirks2 & SDHCI_QUIRK2_RSP_136_HAS_CRC)

		return;



	/* CRC is stripped so we need to do some shifting */

	for (i = 0; i < 4; i++) {

		cmd->resp[i] <<= 8;

drivers/mmc/host/sdhci.h

+2 −0
Original line number Diff line number Diff line
@@ -435,6 +435,8 @@ struct sdhci_host { 
#define SDHCI_QUIRK2_ACMD23_BROKEN			(1<<14)

/* Broken Clock divider zero in controller */

#define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN		(1<<15)

/* Controller has CRC in 136 bit Command Response */

#define SDHCI_QUIRK2_RSP_136_HAS_CRC			(1<<16)



	int irq;		/* Device IRQ */

	void __iomem *ioaddr;	/* Mapped address */