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Commit 11957aef authored by Zhen Kong's avatar Zhen Kong
Browse files

ARM: dts: msm: add crypto devices for sdm855 



Add qcedev and qcrypto device for sdm855 to enable HW crypto
CE operations.

Change-Id: I64d6c928ab3131c0a5a897706c23264689447702
Signed-off-by: default avatarZhen Kong <zkong@codeaurora.org>
parent 8ad3424d

arch/arm64/boot/dts/qcom/sdm855.dtsi

+53 −0
Original line number Diff line number Diff line
@@ -2474,6 +2474,59 @@ 
		clock-names = "iface";

	};



	qcom_cedev: qcedev@1de0000 {

		compatible = "qcom,qcedev";

		reg = <0x1de0000 0x20000>,

			<0x1dc4000 0x24000>;

		reg-names = "crypto-base","crypto-bam-base";

		interrupts = <0 272 0>;

		qcom,bam-pipe-pair = <3>;

		qcom,ce-hw-instance = <0>;

		qcom,ce-device = <0>;

		qcom,ce-hw-shared;

		qcom,bam-ee = <0>;

		qcom,msm-bus,name = "qcedev-noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<125 512 0 0>,

				<125 512 393600 393600>;

		qcom,smmu-s1-enable;

		qcom,no-clock-support;

		iommus = <&apps_smmu 0x0506 0x0011>,

			 <&apps_smmu 0x0516 0x0011>;

	};



	qcom_crypto: qcrypto@1de0000 {

		compatible = "qcom,qcrypto";

		reg = <0x1de0000 0x20000>,

			 <0x1dc4000 0x24000>;

		reg-names = "crypto-base","crypto-bam-base";

		interrupts = <0 272 0>;

		qcom,bam-pipe-pair = <2>;

		qcom,ce-hw-instance = <0>;

		qcom,ce-device = <0>;

		qcom,bam-ee = <0>;

		qcom,ce-hw-shared;

		qcom,clk-mgmt-sus-res;

		qcom,msm-bus,name = "qcrypto-noc";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<125 512 0 0>,

			<125 512 393600 393600>;

		qcom,use-sw-aes-cbc-ecb-ctr-algo;

		qcom,use-sw-aes-xts-algo;

		qcom,use-sw-aes-ccm-algo;

		qcom,use-sw-ahash-algo;

		qcom,use-sw-aead-algo;

		qcom,use-sw-hmac-algo;

		qcom,smmu-s1-enable;

		qcom,no-clock-support;

		iommus = <&apps_smmu 0x0504 0x0011>,

			 <&apps_smmu 0x0514 0x0011>;

	};



	mem_dump {

		compatible = "qcom,mem-dump";

		memory-region = <&dump_mem>;