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Commit 117a69bc authored Sep 10, 2018 by Dieter Luecking Committed by Mangesh Kunchamwar Sep 26, 2018

ARM: dts: msm: Change I2C clk to 100kHz for CSRA



For CSRA configurations the I2C clock speed is
now  100kHz (&i2c_2, &i2c_5).

Change-Id: I3e06ae38da54043a9c1ab1d85519dbf1e011eb95
Signed-off-by: Dieter Luecking <dieterl@codeaurora.org>

parent dbc961c3

arch/arm64/boot/dts/qcom/qcs405-csra1.dtsi

+1 −0

Original line number	Diff line number	Diff line
		@@ -12,6 +12,7 @@
		*/

		&i2c_5 {
		qcom,clk-freq-out = <100000>;
		status = "okay";
		/* CSRA66X0 cluster GRP_0 */
		csra66x0_ampl_68: csra66x0@68 {

arch/arm64/boot/dts/qcom/qcs405-csra6.dtsi

+1 −0

Original line number	Diff line number	Diff line
		@@ -12,6 +12,7 @@
		*/

		&i2c_5 {
		qcom,clk-freq-out = <100000>;
		status = "okay";
		/* CSRA66X0 cluster GRP_0 */
		csra66x0_ampl_68: csra66x0@68 {