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Commit 114d7dc0 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Rename bunch of vlv_ watermark structures to g4x_ 



We'll be wanting to share some of these watermark structures on g4x,
so let's rename them to have a g4x_ prefix instead of vlv_.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170421181432.15216-5-ville.syrjala@linux.intel.com


Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
parent 6d5019b6

drivers/gpu/drm/i915/i915_drv.h

+4 −4
Original line number Diff line number Diff line
@@ -1652,11 +1652,11 @@ struct ilk_wm_values { 
	enum intel_ddb_partitioning partitioning;

};



struct vlv_pipe_wm {

struct g4x_pipe_wm {

	uint16_t plane[I915_MAX_PLANES];

};



struct vlv_sr_wm {

struct g4x_sr_wm {

	uint16_t plane;

	uint16_t cursor;

};
@@ -1666,8 +1666,8 @@ struct vlv_wm_ddl_values { 
};



struct vlv_wm_values {

	struct vlv_pipe_wm pipe[3];

	struct vlv_sr_wm sr;

	struct g4x_pipe_wm pipe[3];

	struct g4x_sr_wm sr;

	struct vlv_wm_ddl_values ddl[3];

	uint8_t level;

	bool cxsr;

drivers/gpu/drm/i915/intel_drv.h

+3 −3
Original line number Diff line number Diff line
@@ -512,8 +512,8 @@ enum vlv_wm_level { 
};



struct vlv_wm_state {

	struct vlv_pipe_wm wm[NUM_VLV_WM_LEVELS];

	struct vlv_sr_wm sr[NUM_VLV_WM_LEVELS];

	struct g4x_pipe_wm wm[NUM_VLV_WM_LEVELS];

	struct g4x_sr_wm sr[NUM_VLV_WM_LEVELS];

	uint8_t num_levels;

	bool cxsr;

};
@@ -549,7 +549,7 @@ struct intel_crtc_wm_state { 


		struct {

			/* "raw" watermarks (not inverted) */

			struct vlv_pipe_wm raw[NUM_VLV_WM_LEVELS];

			struct g4x_pipe_wm raw[NUM_VLV_WM_LEVELS];

			/* intermediate watermarks (inverted) */

			struct vlv_wm_state intermediate;

			/* optimal watermarks (inverted) */

drivers/gpu/drm/i915/intel_pm.c

+7 −7
Original line number Diff line number Diff line
@@ -1062,7 +1062,7 @@ static bool vlv_need_sprite0_fifo_workaround(unsigned int active_planes) 
static int vlv_compute_fifo(struct intel_crtc_state *crtc_state)

{

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

	const struct vlv_pipe_wm *raw =

	const struct g4x_pipe_wm *raw =

		&crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2];

	struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state;

	unsigned int active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
@@ -1178,7 +1178,7 @@ static bool vlv_raw_plane_wm_set(struct intel_crtc_state *crtc_state, 
	bool dirty = false;



	for (; level < num_levels; level++) {

		struct vlv_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];

		struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];



		dirty |= raw->plane[plane_id] != value;

		raw->plane[plane_id] = value;
@@ -1202,7 +1202,7 @@ static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, 
	}



	for (level = 0; level < num_levels; level++) {

		struct vlv_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];

		struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];

		int wm = vlv_compute_wm_level(crtc_state, plane_state, level);

		int max_wm = plane_id == PLANE_CURSOR ? 63 : 511;
@@ -1230,7 +1230,7 @@ static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state, 
static bool vlv_raw_plane_wm_is_valid(const struct intel_crtc_state *crtc_state,

				      enum plane_id plane_id, int level)

{

	const struct vlv_pipe_wm *raw =

	const struct g4x_pipe_wm *raw =

		&crtc_state->wm.vlv.raw[level];

	const struct vlv_fifo_state *fifo_state =

		&crtc_state->wm.vlv.fifo_state;
@@ -1315,7 +1315,7 @@ static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state) 
	wm_state->cxsr = crtc->pipe != PIPE_C && num_active_planes == 1;



	for (level = 0; level < wm_state->num_levels; level++) {

		const struct vlv_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];

		const struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];

		const int sr_fifo_size = INTEL_INFO(dev_priv)->num_pipes * 512 - 1;



		if (!vlv_raw_crtc_wm_is_valid(crtc_state, level))
@@ -4785,7 +4785,7 @@ void vlv_wm_get_hw_state(struct drm_device *dev) 
		active->cxsr = wm->cxsr;



		for (level = 0; level < active->num_levels; level++) {

			struct vlv_pipe_wm *raw =

			struct g4x_pipe_wm *raw =

				&crtc_state->wm.vlv.raw[level];



			active->sr[level].plane = wm->sr.plane;
@@ -4845,7 +4845,7 @@ void vlv_wm_sanitize(struct drm_i915_private *dev_priv) 
			continue;



		for (level = 0; level < wm_state->num_levels; level++) {

			struct vlv_pipe_wm *raw =

			struct g4x_pipe_wm *raw =

				&crtc_state->wm.vlv.raw[level];



			raw->plane[plane_id] = 0;