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Commit 110e6f26 authored by Dave Airlie's avatar Dave Airlie Committed by Alex Deucher
Browse files

drm/amd: make a type-safe cgs_device struct. (v2) 



This is just a type-safety things to avoid everyone taking void *,
it doesn't change anything.

v2: agd5f: split out the dal changes into a separate patch.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c0365541

drivers/gpu/drm/amd/acp/acp_hw.c

+1 −1
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ 


#define mmACP_AZALIA_I2S_SELECT 0x51d4



int amd_acp_hw_init(void *cgs_device,

int amd_acp_hw_init(struct cgs_device *cgs_device,

		    unsigned acp_version_major, unsigned acp_version_minor)

{

	unsigned int acp_mode = ACP_MODE_I2S;

drivers/gpu/drm/amd/acp/include/acp_gfx_if.h

+1 −1
Original line number Diff line number Diff line
@@ -28,7 +28,7 @@ 
#include "cgs_linux.h"

#include "cgs_common.h"



int amd_acp_hw_init(void *cgs_device,

int amd_acp_hw_init(struct cgs_device *cgs_device,

		    unsigned acp_version_major, unsigned acp_version_minor);



#endif /* _ACP_GFX_IF_H */

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+2 −9
Original line number Diff line number Diff line
@@ -1868,15 +1868,8 @@ struct amdgpu_atcs { 
/*

 * CGS

 */

void *amdgpu_cgs_create_device(struct amdgpu_device *adev);

void amdgpu_cgs_destroy_device(void *cgs_device);





/*

 * CGS

 */

void *amdgpu_cgs_create_device(struct amdgpu_device *adev);

void amdgpu_cgs_destroy_device(void *cgs_device);

struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev);

void amdgpu_cgs_destroy_device(struct cgs_device *cgs_device);





/* GPU virtualization */

drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h

+1 −1
Original line number Diff line number Diff line
@@ -30,7 +30,7 @@ 


struct amdgpu_acp {

	struct device *parent;

	void *cgs_device;

	struct cgs_device *cgs_device;

	struct amd_acp_private *private;

	struct mfd_cell *acp_cell;

	struct resource *acp_res;

drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c

+46 −46
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ struct amdgpu_cgs_device { 
	struct amdgpu_device *adev =					\

		((struct amdgpu_cgs_device *)cgs_device)->adev



static int amdgpu_cgs_gpu_mem_info(void *cgs_device, enum cgs_gpu_mem_type type,

static int amdgpu_cgs_gpu_mem_info(struct cgs_device *cgs_device, enum cgs_gpu_mem_type type,

				   uint64_t *mc_start, uint64_t *mc_size,

				   uint64_t *mem_size)

{
@@ -73,7 +73,7 @@ static int amdgpu_cgs_gpu_mem_info(void *cgs_device, enum cgs_gpu_mem_type type, 
	return 0;

}



static int amdgpu_cgs_gmap_kmem(void *cgs_device, void *kmem,

static int amdgpu_cgs_gmap_kmem(struct cgs_device *cgs_device, void *kmem,

				uint64_t size,

				uint64_t min_offset, uint64_t max_offset,

				cgs_handle_t *kmem_handle, uint64_t *mcaddr)
@@ -102,7 +102,7 @@ static int amdgpu_cgs_gmap_kmem(void *cgs_device, void *kmem, 
	return ret;

}



static int amdgpu_cgs_gunmap_kmem(void *cgs_device, cgs_handle_t kmem_handle)

static int amdgpu_cgs_gunmap_kmem(struct cgs_device *cgs_device, cgs_handle_t kmem_handle)

{

	struct amdgpu_bo *obj = (struct amdgpu_bo *)kmem_handle;
@@ -118,7 +118,7 @@ static int amdgpu_cgs_gunmap_kmem(void *cgs_device, cgs_handle_t kmem_handle) 
	return 0;

}



static int amdgpu_cgs_alloc_gpu_mem(void *cgs_device,

static int amdgpu_cgs_alloc_gpu_mem(struct cgs_device *cgs_device,

				    enum cgs_gpu_mem_type type,

				    uint64_t size, uint64_t align,

				    uint64_t min_offset, uint64_t max_offset,
@@ -208,7 +208,7 @@ static int amdgpu_cgs_alloc_gpu_mem(void *cgs_device, 
	return ret;

}



static int amdgpu_cgs_free_gpu_mem(void *cgs_device, cgs_handle_t handle)

static int amdgpu_cgs_free_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle)

{

	struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;
@@ -225,7 +225,7 @@ static int amdgpu_cgs_free_gpu_mem(void *cgs_device, cgs_handle_t handle) 
	return 0;

}



static int amdgpu_cgs_gmap_gpu_mem(void *cgs_device, cgs_handle_t handle,

static int amdgpu_cgs_gmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle,

				   uint64_t *mcaddr)

{

	int r;
@@ -246,7 +246,7 @@ static int amdgpu_cgs_gmap_gpu_mem(void *cgs_device, cgs_handle_t handle, 
	return r;

}



static int amdgpu_cgs_gunmap_gpu_mem(void *cgs_device, cgs_handle_t handle)

static int amdgpu_cgs_gunmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle)

{

	int r;

	struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;
@@ -258,7 +258,7 @@ static int amdgpu_cgs_gunmap_gpu_mem(void *cgs_device, cgs_handle_t handle) 
	return r;

}



static int amdgpu_cgs_kmap_gpu_mem(void *cgs_device, cgs_handle_t handle,

static int amdgpu_cgs_kmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle,

				   void **map)

{

	int r;
@@ -271,7 +271,7 @@ static int amdgpu_cgs_kmap_gpu_mem(void *cgs_device, cgs_handle_t handle, 
	return r;

}



static int amdgpu_cgs_kunmap_gpu_mem(void *cgs_device, cgs_handle_t handle)

static int amdgpu_cgs_kunmap_gpu_mem(struct cgs_device *cgs_device, cgs_handle_t handle)

{

	int r;

	struct amdgpu_bo *obj = (struct amdgpu_bo *)handle;
@@ -283,20 +283,20 @@ static int amdgpu_cgs_kunmap_gpu_mem(void *cgs_device, cgs_handle_t handle) 
	return r;

}



static uint32_t amdgpu_cgs_read_register(void *cgs_device, unsigned offset)

static uint32_t amdgpu_cgs_read_register(struct cgs_device *cgs_device, unsigned offset)

{

	CGS_FUNC_ADEV;

	return RREG32(offset);

}



static void amdgpu_cgs_write_register(void *cgs_device, unsigned offset,

static void amdgpu_cgs_write_register(struct cgs_device *cgs_device, unsigned offset,

				      uint32_t value)

{

	CGS_FUNC_ADEV;

	WREG32(offset, value);

}



static uint32_t amdgpu_cgs_read_ind_register(void *cgs_device,

static uint32_t amdgpu_cgs_read_ind_register(struct cgs_device *cgs_device,

					     enum cgs_ind_reg space,

					     unsigned index)

{
@@ -320,7 +320,7 @@ static uint32_t amdgpu_cgs_read_ind_register(void *cgs_device, 
	return 0;

}



static void amdgpu_cgs_write_ind_register(void *cgs_device,

static void amdgpu_cgs_write_ind_register(struct cgs_device *cgs_device,

					  enum cgs_ind_reg space,

					  unsigned index, uint32_t value)

{
@@ -343,7 +343,7 @@ static void amdgpu_cgs_write_ind_register(void *cgs_device, 
	WARN(1, "Invalid indirect register space");

}



static uint8_t amdgpu_cgs_read_pci_config_byte(void *cgs_device, unsigned addr)

static uint8_t amdgpu_cgs_read_pci_config_byte(struct cgs_device *cgs_device, unsigned addr)

{

	CGS_FUNC_ADEV;

	uint8_t val;
@@ -353,7 +353,7 @@ static uint8_t amdgpu_cgs_read_pci_config_byte(void *cgs_device, unsigned addr) 
	return val;

}



static uint16_t amdgpu_cgs_read_pci_config_word(void *cgs_device, unsigned addr)

static uint16_t amdgpu_cgs_read_pci_config_word(struct cgs_device *cgs_device, unsigned addr)

{

	CGS_FUNC_ADEV;

	uint16_t val;
@@ -363,7 +363,7 @@ static uint16_t amdgpu_cgs_read_pci_config_word(void *cgs_device, unsigned addr) 
	return val;

}



static uint32_t amdgpu_cgs_read_pci_config_dword(void *cgs_device,

static uint32_t amdgpu_cgs_read_pci_config_dword(struct cgs_device *cgs_device,

						 unsigned addr)

{

	CGS_FUNC_ADEV;
@@ -374,7 +374,7 @@ static uint32_t amdgpu_cgs_read_pci_config_dword(void *cgs_device, 
	return val;

}



static void amdgpu_cgs_write_pci_config_byte(void *cgs_device, unsigned addr,

static void amdgpu_cgs_write_pci_config_byte(struct cgs_device *cgs_device, unsigned addr,

					     uint8_t value)

{

	CGS_FUNC_ADEV;
@@ -382,7 +382,7 @@ static void amdgpu_cgs_write_pci_config_byte(void *cgs_device, unsigned addr, 
	WARN(ret, "pci_write_config_byte error");

}



static void amdgpu_cgs_write_pci_config_word(void *cgs_device, unsigned addr,

static void amdgpu_cgs_write_pci_config_word(struct cgs_device *cgs_device, unsigned addr,

					     uint16_t value)

{

	CGS_FUNC_ADEV;
@@ -390,7 +390,7 @@ static void amdgpu_cgs_write_pci_config_word(void *cgs_device, unsigned addr, 
	WARN(ret, "pci_write_config_word error");

}



static void amdgpu_cgs_write_pci_config_dword(void *cgs_device, unsigned addr,

static void amdgpu_cgs_write_pci_config_dword(struct cgs_device *cgs_device, unsigned addr,

					      uint32_t value)

{

	CGS_FUNC_ADEV;
@@ -399,7 +399,7 @@ static void amdgpu_cgs_write_pci_config_dword(void *cgs_device, unsigned addr, 
}





static int amdgpu_cgs_get_pci_resource(void *cgs_device,

static int amdgpu_cgs_get_pci_resource(struct cgs_device *cgs_device,

				       enum cgs_resource_type resource_type,

				       uint64_t size,

				       uint64_t offset,
@@ -433,7 +433,7 @@ static int amdgpu_cgs_get_pci_resource(void *cgs_device, 
	}

}



static const void *amdgpu_cgs_atom_get_data_table(void *cgs_device,

static const void *amdgpu_cgs_atom_get_data_table(struct cgs_device *cgs_device,

						  unsigned table, uint16_t *size,

						  uint8_t *frev, uint8_t *crev)

{
@@ -449,7 +449,7 @@ static const void *amdgpu_cgs_atom_get_data_table(void *cgs_device, 
	return NULL;

}



static int amdgpu_cgs_atom_get_cmd_table_revs(void *cgs_device, unsigned table,

static int amdgpu_cgs_atom_get_cmd_table_revs(struct cgs_device *cgs_device, unsigned table,

					      uint8_t *frev, uint8_t *crev)

{

	CGS_FUNC_ADEV;
@@ -462,7 +462,7 @@ static int amdgpu_cgs_atom_get_cmd_table_revs(void *cgs_device, unsigned table, 
	return -EINVAL;

}



static int amdgpu_cgs_atom_exec_cmd_table(void *cgs_device, unsigned table,

static int amdgpu_cgs_atom_exec_cmd_table(struct cgs_device *cgs_device, unsigned table,

					  void *args)

{

	CGS_FUNC_ADEV;
@@ -471,33 +471,33 @@ static int amdgpu_cgs_atom_exec_cmd_table(void *cgs_device, unsigned table, 
		adev->mode_info.atom_context, table, args);

}



static int amdgpu_cgs_create_pm_request(void *cgs_device, cgs_handle_t *request)

static int amdgpu_cgs_create_pm_request(struct cgs_device *cgs_device, cgs_handle_t *request)

{

	/* TODO */

	return 0;

}



static int amdgpu_cgs_destroy_pm_request(void *cgs_device, cgs_handle_t request)

static int amdgpu_cgs_destroy_pm_request(struct cgs_device *cgs_device, cgs_handle_t request)

{

	/* TODO */

	return 0;

}



static int amdgpu_cgs_set_pm_request(void *cgs_device, cgs_handle_t request,

static int amdgpu_cgs_set_pm_request(struct cgs_device *cgs_device, cgs_handle_t request,

				     int active)

{

	/* TODO */

	return 0;

}



static int amdgpu_cgs_pm_request_clock(void *cgs_device, cgs_handle_t request,

static int amdgpu_cgs_pm_request_clock(struct cgs_device *cgs_device, cgs_handle_t request,

				       enum cgs_clock clock, unsigned freq)

{

	/* TODO */

	return 0;

}



static int amdgpu_cgs_pm_request_engine(void *cgs_device, cgs_handle_t request,

static int amdgpu_cgs_pm_request_engine(struct cgs_device *cgs_device, cgs_handle_t request,

					enum cgs_engine engine, int powered)

{

	/* TODO */
@@ -506,7 +506,7 @@ static int amdgpu_cgs_pm_request_engine(void *cgs_device, cgs_handle_t request, 






static int amdgpu_cgs_pm_query_clock_limits(void *cgs_device,

static int amdgpu_cgs_pm_query_clock_limits(struct cgs_device *cgs_device,

					    enum cgs_clock clock,

					    struct cgs_clock_limits *limits)

{
@@ -514,7 +514,7 @@ static int amdgpu_cgs_pm_query_clock_limits(void *cgs_device, 
	return 0;

}



static int amdgpu_cgs_set_camera_voltages(void *cgs_device, uint32_t mask,

static int amdgpu_cgs_set_camera_voltages(struct cgs_device *cgs_device, uint32_t mask,

					  const uint32_t *voltages)

{

	DRM_ERROR("not implemented");
@@ -565,7 +565,7 @@ static const struct amdgpu_irq_src_funcs cgs_irq_funcs = { 
	.process = cgs_process_irq,

};



static int amdgpu_cgs_add_irq_source(void *cgs_device, unsigned src_id,

static int amdgpu_cgs_add_irq_source(struct cgs_device *cgs_device, unsigned src_id,

				     unsigned num_types,

				     cgs_irq_source_set_func_t set,

				     cgs_irq_handler_func_t handler,
@@ -600,19 +600,19 @@ static int amdgpu_cgs_add_irq_source(void *cgs_device, unsigned src_id, 
	return ret;

}



static int amdgpu_cgs_irq_get(void *cgs_device, unsigned src_id, unsigned type)

static int amdgpu_cgs_irq_get(struct cgs_device *cgs_device, unsigned src_id, unsigned type)

{

	CGS_FUNC_ADEV;

	return amdgpu_irq_get(adev, adev->irq.sources[src_id], type);

}



static int amdgpu_cgs_irq_put(void *cgs_device, unsigned src_id, unsigned type)

static int amdgpu_cgs_irq_put(struct cgs_device *cgs_device, unsigned src_id, unsigned type)

{

	CGS_FUNC_ADEV;

	return amdgpu_irq_put(adev, adev->irq.sources[src_id], type);

}



int amdgpu_cgs_set_clockgating_state(void *cgs_device,

int amdgpu_cgs_set_clockgating_state(struct cgs_device *cgs_device,

				  enum amd_ip_block_type block_type,

				  enum amd_clockgating_state state)

{
@@ -633,7 +633,7 @@ int amdgpu_cgs_set_clockgating_state(void *cgs_device, 
	return r;

}



int amdgpu_cgs_set_powergating_state(void *cgs_device,

int amdgpu_cgs_set_powergating_state(struct cgs_device *cgs_device,

				  enum amd_ip_block_type block_type,

				  enum amd_powergating_state state)

{
@@ -655,7 +655,7 @@ int amdgpu_cgs_set_powergating_state(void *cgs_device, 
}





static uint32_t fw_type_convert(void *cgs_device, uint32_t fw_type)

static uint32_t fw_type_convert(struct cgs_device *cgs_device, uint32_t fw_type)

{

	CGS_FUNC_ADEV;

	enum AMDGPU_UCODE_ID result = AMDGPU_UCODE_ID_MAXIMUM;
@@ -695,7 +695,7 @@ static uint32_t fw_type_convert(void *cgs_device, uint32_t fw_type) 
	return result;

}



static int amdgpu_cgs_get_firmware_info(void *cgs_device,

static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,

					enum cgs_ucode_id type,

					struct cgs_firmware_info *info)

{
@@ -774,7 +774,7 @@ static int amdgpu_cgs_get_firmware_info(void *cgs_device, 
	return 0;

}



static int amdgpu_cgs_query_system_info(void *cgs_device,

static int amdgpu_cgs_query_system_info(struct cgs_device *cgs_device,

				struct cgs_system_info *sys_info)

{

	CGS_FUNC_ADEV;
@@ -808,7 +808,7 @@ static int amdgpu_cgs_query_system_info(void *cgs_device, 
	return 0;

}



static int amdgpu_cgs_get_active_displays_info(void *cgs_device,

static int amdgpu_cgs_get_active_displays_info(struct cgs_device *cgs_device,

					  struct cgs_display_info *info)

{

	CGS_FUNC_ADEV;
@@ -851,7 +851,7 @@ static int amdgpu_cgs_get_active_displays_info(void *cgs_device, 
}





static int amdgpu_cgs_notify_dpm_enabled(void *cgs_device, bool enabled)

static int amdgpu_cgs_notify_dpm_enabled(struct cgs_device *cgs_device, bool enabled)

{

	CGS_FUNC_ADEV;
@@ -867,7 +867,7 @@ static int amdgpu_cgs_notify_dpm_enabled(void *cgs_device, bool enabled) 
 */



#if defined(CONFIG_ACPI)

static int amdgpu_cgs_acpi_eval_object(void *cgs_device,

static int amdgpu_cgs_acpi_eval_object(struct cgs_device *cgs_device,

				    struct cgs_acpi_method_info *info)

{

	CGS_FUNC_ADEV;
@@ -1030,14 +1030,14 @@ static int amdgpu_cgs_acpi_eval_object(void *cgs_device, 
	return result;

}

#else

static int amdgpu_cgs_acpi_eval_object(void *cgs_device,

static int amdgpu_cgs_acpi_eval_object(struct cgs_device *cgs_device,

				struct cgs_acpi_method_info *info)

{

	return -EIO;

}

#endif



int amdgpu_cgs_call_acpi_method(void *cgs_device,

int amdgpu_cgs_call_acpi_method(struct cgs_device *cgs_device,

					uint32_t acpi_method,

					uint32_t acpi_function,

					void *pinput, void *poutput,
@@ -1121,7 +1121,7 @@ static const struct cgs_os_ops amdgpu_cgs_os_ops = { 
	amdgpu_cgs_irq_put

};



void *amdgpu_cgs_create_device(struct amdgpu_device *adev)

struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev)

{

	struct amdgpu_cgs_device *cgs_device =

		kmalloc(sizeof(*cgs_device), GFP_KERNEL);
@@ -1135,10 +1135,10 @@ void *amdgpu_cgs_create_device(struct amdgpu_device *adev) 
	cgs_device->base.os_ops = &amdgpu_cgs_os_ops;

	cgs_device->adev = adev;



	return cgs_device;

	return (struct cgs_device *)cgs_device;

}



void amdgpu_cgs_destroy_device(void *cgs_device)

void amdgpu_cgs_destroy_device(struct cgs_device *cgs_device)

{

	kfree(cgs_device);

}